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authorSimon Dardis <simon.dardis@imgtec.com>2017-06-09 14:37:08 +0000
committerSimon Dardis <simon.dardis@imgtec.com>2017-06-09 14:37:08 +0000
commit212cccb2f46ada8f13a4068924e3899e5c2ecd4a (patch)
treea78ee1a263f782b18f5fea60e278e65179b18e40 /llvm/lib/Target/Mips/MipsCCState.h
parenta1cee29608a447ba40aacd979a8479b376ccde62 (diff)
downloadbcm5719-llvm-212cccb2f46ada8f13a4068924e3899e5c2ecd4a.tar.gz
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Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
By target hookifying getRegisterType, getNumRegisters, getVectorBreakdown, backends can request that LLVM to scalarize vector types for calls and returns. The MIPS vector ABI requires that vector arguments and returns are passed in integer registers. With SelectionDAG's new hooks, the MIPS backend can now handle LLVM-IR with vector types in calls and returns. E.g. 'call @foo(<4 x i32> %4)'. Previously these cases would be scalarized for the MIPS O32/N32/N64 ABI for calls and returns if vector types were not legal. If vector types were legal, a single 128bit vector argument would be assigned to a single 32 bit / 64 bit integer register. By teaching the MIPS backend to inspect the original types, it can now implement the MIPS vector ABI which requires a particular method of scalarizing vectors. Previously, the MIPS backend relied on clang to scalarize types such as "call @foo(<4 x float> %a) into "call @foo(i32 inreg %1, i32 inreg %2, i32 inreg %3, i32 inreg %4)". This patch enables the MIPS backend to take either form for vector types. The previous version of this patch had a "conditional move or jump depends on uninitialized value". Reviewers: zoran.jovanovic, jaydeep, vkalintiris, slthakur Differential Revision: https://reviews.llvm.org/D27845 llvm-svn: 305083
Diffstat (limited to 'llvm/lib/Target/Mips/MipsCCState.h')
-rw-r--r--llvm/lib/Target/Mips/MipsCCState.h33
1 files changed, 32 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsCCState.h b/llvm/lib/Target/Mips/MipsCCState.h
index 77ecc65b2ee..27901699480 100644
--- a/llvm/lib/Target/Mips/MipsCCState.h
+++ b/llvm/lib/Target/Mips/MipsCCState.h
@@ -45,16 +45,33 @@ private:
const char *Func);
/// Identify lowered values that originated from f128 arguments and record
- /// this.
+ /// this for use by RetCC_MipsN.
void
PreAnalyzeFormalArgumentsForF128(const SmallVectorImpl<ISD::InputArg> &Ins);
+ void
+ PreAnalyzeCallResultForVectorFloat(const SmallVectorImpl<ISD::InputArg> &Ins,
+ const Type *RetTy);
+
+ void PreAnalyzeFormalArgumentsForVectorFloat(
+ const SmallVectorImpl<ISD::InputArg> &Ins);
+
+ void
+ PreAnalyzeReturnForVectorFloat(const SmallVectorImpl<ISD::OutputArg> &Outs);
+
/// Records whether the value has been lowered from an f128.
SmallVector<bool, 4> OriginalArgWasF128;
/// Records whether the value has been lowered from float.
SmallVector<bool, 4> OriginalArgWasFloat;
+ /// Records whether the value has been lowered from a floating point vector.
+ SmallVector<bool, 4> OriginalArgWasFloatVector;
+
+ /// Records whether the return value has been lowered from a floating point
+ /// vector.
+ SmallVector<bool, 4> OriginalRetWasFloatVector;
+
/// Records whether the value was a fixed argument.
/// See ISD::OutputArg::IsFixed,
SmallVector<bool, 4> CallOperandIsFixed;
@@ -78,6 +95,7 @@ public:
CCState::AnalyzeCallOperands(Outs, Fn);
OriginalArgWasF128.clear();
OriginalArgWasFloat.clear();
+ OriginalArgWasFloatVector.clear();
CallOperandIsFixed.clear();
}
@@ -96,31 +114,38 @@ public:
CCState::AnalyzeFormalArguments(Ins, Fn);
OriginalArgWasFloat.clear();
OriginalArgWasF128.clear();
+ OriginalArgWasFloatVector.clear();
}
void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
CCAssignFn Fn, const Type *RetTy,
const char *Func) {
PreAnalyzeCallResultForF128(Ins, RetTy, Func);
+ PreAnalyzeCallResultForVectorFloat(Ins, RetTy);
CCState::AnalyzeCallResult(Ins, Fn);
OriginalArgWasFloat.clear();
OriginalArgWasF128.clear();
+ OriginalArgWasFloatVector.clear();
}
void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
CCAssignFn Fn) {
PreAnalyzeReturnForF128(Outs);
+ PreAnalyzeReturnForVectorFloat(Outs);
CCState::AnalyzeReturn(Outs, Fn);
OriginalArgWasFloat.clear();
OriginalArgWasF128.clear();
+ OriginalArgWasFloatVector.clear();
}
bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
CCAssignFn Fn) {
PreAnalyzeReturnForF128(ArgsFlags);
+ PreAnalyzeReturnForVectorFloat(ArgsFlags);
bool Return = CCState::CheckReturn(ArgsFlags, Fn);
OriginalArgWasFloat.clear();
OriginalArgWasF128.clear();
+ OriginalArgWasFloatVector.clear();
return Return;
}
@@ -128,6 +153,12 @@ public:
bool WasOriginalArgFloat(unsigned ValNo) {
return OriginalArgWasFloat[ValNo];
}
+ bool WasOriginalArgVectorFloat(unsigned ValNo) const {
+ return OriginalArgWasFloatVector[ValNo];
+ }
+ bool WasOriginalRetVectorFloat(unsigned ValNo) const {
+ return OriginalRetWasFloatVector[ValNo];
+ }
bool IsCallOperandFixed(unsigned ValNo) { return CallOperandIsFixed[ValNo]; }
SpecialCallingConvType getSpecialCallingConv() { return SpecialCallingConv; }
};
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