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authorAkira Hatanaka <ahatanak@gmail.com>2011-07-07 18:57:00 +0000
committerAkira Hatanaka <ahatanak@gmail.com>2011-07-07 18:57:00 +0000
commit2e766ed2f8f701f114e0de43bf3f38143e6acabe (patch)
treea125b8f8e580af03e7ec08f19813fb1ef922c2b7 /llvm/lib/Target/Mips/MipsAsmPrinter.cpp
parent6f472e803bf88243f5962ce57418ace971c31565 (diff)
downloadbcm5719-llvm-2e766ed2f8f701f114e0de43bf3f38143e6acabe.tar.gz
bcm5719-llvm-2e766ed2f8f701f114e0de43bf3f38143e6acabe.zip
Reverse order of operands of address operand mem so that the base operand comes
before the offset. This change will enable simplification of function MipsRegisterInfo::eliminateFrameIndex. llvm-svn: 134625
Diffstat (limited to 'llvm/lib/Target/Mips/MipsAsmPrinter.cpp')
-rw-r--r--llvm/lib/Target/Mips/MipsAsmPrinter.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
index 0ba4d6319a7..8a33ac10a09 100644
--- a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
+++ b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
@@ -412,18 +412,18 @@ printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
// when using stack locations for not load/store instructions
// print the same way as all normal 3 operand instructions.
if (Modifier && !strcmp(Modifier, "stackloc")) {
- printOperand(MI, opNum+1, O);
- O << ", ";
printOperand(MI, opNum, O);
+ O << ", ";
+ printOperand(MI, opNum+1, O);
return;
}
// Load/Store memory operands -- imm($reg)
// If PIC target the target is loaded as the
// pattern lw $25,%call16($28)
- printOperand(MI, opNum, O);
- O << "(";
printOperand(MI, opNum+1, O);
+ O << "(";
+ printOperand(MI, opNum, O);
O << ")";
}
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