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authorReed Kotler <rkotler@mips.com>2013-02-18 04:55:38 +0000
committerReed Kotler <rkotler@mips.com>2013-02-18 04:55:38 +0000
commit6879e56dc7ed5e871bf6bd41b0c01bfdbf95142a (patch)
tree18d56a4392cde78dcb546849630176dd59d594f4 /llvm/lib/Target/Mips/Mips16InstrInfo.cpp
parentc32fb5969c2f330960f2c6afdfb8997f729d6e2e (diff)
downloadbcm5719-llvm-6879e56dc7ed5e871bf6bd41b0c01bfdbf95142a.tar.gz
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Expand pseudo/macro BteqzT8SltuX16 . There is no test case because
at this time, llvm is generating a different but equivalent pattern that would lead to this instruction. I am trying to think of a way to get it to generate this. If I can't, I may just remove the pseudo. llvm-svn: 175419
Diffstat (limited to 'llvm/lib/Target/Mips/Mips16InstrInfo.cpp')
-rw-r--r--llvm/lib/Target/Mips/Mips16InstrInfo.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
index ba1002ed4ca..e0277ff5a00 100644
--- a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
+++ b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
@@ -142,6 +142,11 @@ bool Mips16InstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
case Mips::BteqzT8SltX16:
ExpandFEXT_T8I816_ins(MBB, MI, Mips::BteqzX16, Mips::SltRxRy16);
break;
+ case Mips::BteqzT8SltuX16:
+ // TBD: figure out a way to get this or remove the instruction
+ // altogether.
+ ExpandFEXT_T8I816_ins(MBB, MI, Mips::BteqzX16, Mips::SltuRxRy16);
+ break;
case Mips::BtnezT8CmpX16:
ExpandFEXT_T8I816_ins(MBB, MI, Mips::BtnezX16, Mips::CmpRxRy16);
break;
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