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| author | Simon Atanasyan <simon@atanasyan.com> | 2018-09-19 18:46:21 +0000 |
|---|---|---|
| committer | Simon Atanasyan <simon@atanasyan.com> | 2018-09-19 18:46:21 +0000 |
| commit | 852dd83be8b7586036877065e690f5bcb564ea86 (patch) | |
| tree | 843634a7b2285f06d0a04daaaa94757a60f63ffc /llvm/lib/Target/Mips/MCTargetDesc | |
| parent | 241c33bca7f1361573865c672b4e968511e04d8a (diff) | |
| download | bcm5719-llvm-852dd83be8b7586036877065e690f5bcb564ea86.tar.gz bcm5719-llvm-852dd83be8b7586036877065e690f5bcb564ea86.zip | |
[mips][microMIPS] Fix the definition of MOVEP instruction
The patch fixes definition of MOVEP instruction. Two registers are used
instead of register pairs. This is necessary as machine verifier cannot
handle register pairs.
Patch by Milena Vujosevic Janicic.
Differential revision: https://reviews.llvm.org/D52035
llvm-svn: 342571
Diffstat (limited to 'llvm/lib/Target/Mips/MCTargetDesc')
| -rw-r--r-- | llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp index cd34b0ab70b..8e880b635c1 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp @@ -213,6 +213,12 @@ encodeInstruction(const MCInst &MI, raw_ostream &OS, TmpInst.setOpcode (NewOpcode); Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); } + + if (((MI.getOpcode() == Mips::MOVEP_MM) || + (MI.getOpcode() == Mips::MOVEP_MMR6))) { + unsigned RegPair = getMovePRegPairOpValue(MI, 0, Fixups, STI); + Binary = (Binary & 0xFFFFFC7F) | (RegPair << 7); + } } const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode()); |

