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authorToma Tabacu <toma.tabacu@imgtec.com>2014-08-19 14:22:52 +0000
committerToma Tabacu <toma.tabacu@imgtec.com>2014-08-19 14:22:52 +0000
commit85618b3194d40c8df5eb6d096113f7532dfe26cb (patch)
tree4290a0b5ec026e88a527db7c6a2ba7d12484c544 /llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
parent1542a60c0bbb8534b949128dd43df5d940e47eb2 (diff)
downloadbcm5719-llvm-85618b3194d40c8df5eb6d096113f7532dfe26cb.tar.gz
bcm5719-llvm-85618b3194d40c8df5eb6d096113f7532dfe26cb.zip
[mips] Add assembler support for .set arch=x directive.
Summary: This directive is similar to ".set mipsX". It is used to change the CPU target of the assembler, enabling it to accept instructions for a specific CPU. This patch only implements the r4000 CPU (which is treated internally as generic mips3) and the generic ISAs. Contains work done by Matheus Almeida. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4884 llvm-svn: 215978
Diffstat (limited to 'llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp')
-rw-r--r--llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index 2a373ee094c..d19307978d9 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -56,6 +56,9 @@ void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
}
+void MipsTargetStreamer::emitDirectiveSetArch(StringRef Arch) {
+ forbidModuleDirective();
+}
void MipsTargetStreamer::emitDirectiveSetMips1() { forbidModuleDirective(); }
void MipsTargetStreamer::emitDirectiveSetMips2() { forbidModuleDirective(); }
void MipsTargetStreamer::emitDirectiveSetMips3() { forbidModuleDirective(); }
@@ -174,6 +177,11 @@ void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
<< StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
}
+void MipsTargetAsmStreamer::emitDirectiveSetArch(StringRef Arch) {
+ OS << "\t.set arch=" << Arch << "\n";
+ MipsTargetStreamer::emitDirectiveSetArch(Arch);
+}
+
void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
OS << "\t.set\tmips1\n";
MipsTargetStreamer::emitDirectiveSetMips1();
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