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| author | Sasa Stankovic <Sasa.Stankovic@imgtec.com> | 2014-06-09 14:09:28 +0000 |
|---|---|---|
| committer | Sasa Stankovic <Sasa.Stankovic@imgtec.com> | 2014-06-09 14:09:28 +0000 |
| commit | e435f5b2d42c40f33f4bd8126ac726f1cfdde59d (patch) | |
| tree | 392bfdd56b1e37e2e74e29743aea9b1426a29d27 /llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp | |
| parent | 1de1d63aec1e6e319ddc4928a0bdd2decc64e301 (diff) | |
| download | bcm5719-llvm-e435f5b2d42c40f33f4bd8126ac726f1cfdde59d.tar.gz bcm5719-llvm-e435f5b2d42c40f33f4bd8126ac726f1cfdde59d.zip | |
[mips] Fix a bug for NaCl target - Don't report the error when non-dangerous
load/store is in branch delay slot.
Differential Revision: http://llvm-reviews.chandlerc.com/D4048
llvm-svn: 210470
Diffstat (limited to 'llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp index cd6be734dfe..9a7fc85e912 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp @@ -137,18 +137,17 @@ public: &IsStore); bool IsSPFirstOperand = isStackPointerFirstOperand(Inst); if (IsMemAccess || IsSPFirstOperand) { - if (PendingCall) - report_fatal_error("Dangerous instruction in branch delay slot!"); - bool MaskBefore = (IsMemAccess && baseRegNeedsLoadStoreMask(Inst.getOperand(AddrIdx) .getReg())); bool MaskAfter = IsSPFirstOperand && !IsStore; - if (MaskBefore || MaskAfter) + if (MaskBefore || MaskAfter) { + if (PendingCall) + report_fatal_error("Dangerous instruction in branch delay slot!"); sandboxLoadStoreStackChange(Inst, AddrIdx, STI, MaskBefore, MaskAfter); - else - MipsELFStreamer::EmitInstruction(Inst, STI); - return; + return; + } + // fallthrough } // Sandbox calls by aligning call and branch delay to the bundle end. |
