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authorSimon Dardis <simon.dardis@mips.com>2017-11-06 12:59:53 +0000
committerSimon Dardis <simon.dardis@mips.com>2017-11-06 12:59:53 +0000
commit169df4e24b2d95892fc9841786d4fec224a8eeab (patch)
treef6af89ff2dc558cd9226793479448d923e9019b3 /llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
parenta68e048233d7e9e0102ce4864138d187f8de88d0 (diff)
downloadbcm5719-llvm-169df4e24b2d95892fc9841786d4fec224a8eeab.tar.gz
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[mips] Add movep for microMIPS32R6 and fix microMIPS32r3 version
Previously, the 'movep' instruction was defined for microMIPS32r3 and shared that definition with microMIPS32R6. 'movep' was re-encoded for microMIPS32r6, so this patch provides the correct encoding. Secondly, correct the encoding of the 'rs' and 'rt' operands which have an instruction specific encoding for the registers those operands accept. Finally, correct the decoding of the 'dst_regs' operand which was extracting the relevant field from the instruction, but was actually extracting the field from the alreadly extracted field. Reviewers: atanasyan Differential Revision: https://reviews.llvm.org/D39495 llvm-svn: 317475
Diffstat (limited to 'llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h')
-rw-r--r--llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
index d12d3195521..1e840114b2b 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
@@ -252,6 +252,9 @@ public:
unsigned getMovePRegPairOpValue(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const;
+ unsigned getMovePRegSingleOpValue(const MCInst &MI, unsigned OpNo,
+ SmallVectorImpl<MCFixup> &Fixups,
+ const MCSubtargetInfo &STI) const;
unsigned getSimm23Lsl2Encoding(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups,
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