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authorJack Carter <jcarter@mips.com>2013-01-12 01:03:14 +0000
committerJack Carter <jcarter@mips.com>2013-01-12 01:03:14 +0000
commit873c724b4a1662ec5468a055758c11b19ad19ee8 (patch)
treeebdd46adfaf888b219e68d606b54cbf1ba760095 /llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.h
parentd60589ad39a73f8de2f9f0a4e5b78ef7b1a8f8f9 (diff)
downloadbcm5719-llvm-873c724b4a1662ec5468a055758c11b19ad19ee8.tar.gz
bcm5719-llvm-873c724b4a1662ec5468a055758c11b19ad19ee8.zip
This patch tackles the problem of parsing Mips
register names in the standalone assembler llvm-mc. Registers such as $A1 can represent either a 32 or 64 bit register based on the instruction using it. In addition, based on the abi, $T0 can represent different 32 bit registers. The problem is resolved by the Mips specific AsmParser td definitions changing to work together. Many cases of RegisterClass parameters are now RegisterOperand. Contributer: Vladimir Medic llvm-svn: 172284
Diffstat (limited to 'llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.h')
-rw-r--r--llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.h b/llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.h
index 3d8a6f918ff..38cac688015 100644
--- a/llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.h
+++ b/llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.h
@@ -87,6 +87,7 @@ public:
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
+ void printCPURegs(const MCInst *MI, unsigned OpNo, raw_ostream &O);
private:
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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