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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2016-04-22 16:53:15 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2016-04-22 16:53:15 +0000 |
| commit | f6344ff295bcfad3a07a0810c76473df6e04c45f (patch) | |
| tree | 254f803417a10a21eaa7eb4355c73ff4d59baf07 /llvm/lib/Target/Mips/Disassembler | |
| parent | 9062b75a930c74a091dd974401bc783a48ba98b3 (diff) | |
| download | bcm5719-llvm-f6344ff295bcfad3a07a0810c76473df6e04c45f.tar.gz bcm5719-llvm-f6344ff295bcfad3a07a0810c76473df6e04c45f.zip | |
[mips][microMIPS] Revert commit r266861.
Commit r266861 was the reason for failing tests in LLVM test suite.
llvm-svn: 267166
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler')
| -rw-r--r-- | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index f8ac809343f..eeaa5ade9c5 100644 --- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -341,10 +341,6 @@ static DecodeStatus DecodeFMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder); -static DecodeStatus DecodeFMemMMR6(MCInst &Inst, unsigned Insn, - uint64_t Address, - const void *Decoder); - static DecodeStatus DecodeFMem2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder); @@ -357,10 +353,6 @@ static DecodeStatus DecodeFMemCop2R6(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder); -static DecodeStatus DecodeFMemCop2MMR6(MCInst &Inst, unsigned Insn, - uint64_t Address, - const void *Decoder); - static DecodeStatus DecodeSpecial3LlSc(MCInst &Inst, unsigned Insn, uint64_t Address, @@ -1606,22 +1598,6 @@ static DecodeStatus DecodeFMem(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeFMemMMR6(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { - int Offset = SignExtend32<16>(Insn & 0xffff); - unsigned Base = fieldFromInstruction(Insn, 16, 5); - unsigned Reg = fieldFromInstruction(Insn, 21, 5); - - Reg = getReg(Decoder, Mips::FGR64RegClassID, Reg); - Base = getReg(Decoder, Mips::GPR32RegClassID, Base); - - Inst.addOperand(MCOperand::createReg(Reg)); - Inst.addOperand(MCOperand::createReg(Base)); - Inst.addOperand(MCOperand::createImm(Offset)); - - return MCDisassembler::Success; -} - static DecodeStatus DecodeFMem2(MCInst &Inst, unsigned Insn, uint64_t Address, @@ -1675,22 +1651,6 @@ static DecodeStatus DecodeFMemCop2R6(MCInst &Inst, return MCDisassembler::Success; } - -static DecodeStatus DecodeFMemCop2MMR6(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { - int Offset = SignExtend32<11>(Insn & 0x07ff); - unsigned Reg = fieldFromInstruction(Insn, 21, 5); - unsigned Base = fieldFromInstruction(Insn, 16, 5); - - Reg = getReg(Decoder, Mips::COP2RegClassID, Reg); - Base = getReg(Decoder, Mips::GPR32RegClassID, Base); - - Inst.addOperand(MCOperand::createReg(Reg)); - Inst.addOperand(MCOperand::createReg(Base)); - Inst.addOperand(MCOperand::createImm(Offset)); - - return MCDisassembler::Success; -} static DecodeStatus DecodeSpecial3LlSc(MCInst &Inst, unsigned Insn, uint64_t Address, |
