Revert: [mips] Rewrite MipsAsmParser and MipsOperand.' due to buildbot errors in lld tests.

It's currently unable to parse 'sym + imm' without surrounding parenthesis.

llvm-svn: 205237

1 files changed, 1 insertions, 51 deletions

diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
index fc3b922602c..a5438401323 100644
--- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
+++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
@@ -263,11 +263,6 @@ static DecodeStatus DecodeExtSize(MCInst &Inst,
                                   uint64_t Address,
                                   const void *Decoder);
 
-/// INSVE_[BHWD] have an implicit operand that the generated decoder doesn't
-/// handle.
-template <typename InsnType>
-static DecodeStatus DecodeINSVE_DF(MCInst &MI, InsnType insn, uint64_t Address,
-                                   const void *Decoder);
 namespace llvm {
 extern Target TheMipselTarget, TheMipsTarget, TheMips64Target,
               TheMips64elTarget;
@@ -309,53 +304,8 @@ extern "C" void LLVMInitializeMipsDisassembler() {
                                          createMips64elDisassembler);
 }
 
-#include "MipsGenDisassemblerTables.inc"
-
-template <typename InsnType>
-static DecodeStatus DecodeINSVE_DF(MCInst &MI, InsnType insn, uint64_t Address,
-                                   const void *Decoder) {
-  typedef DecodeStatus (*DecodeFN)(MCInst &, unsigned, uint64_t, const void *);
-  // The size of the n field depends on the element size
-  // The register class also depends on this.
-  InsnType tmp = fieldFromInstruction(insn, 17, 5);
-  unsigned NSize = 0;
-  DecodeFN RegDecoder = nullptr;
-  if ((tmp & 0x18) == 0x00) { // INSVE_B
-    NSize = 4;
-    RegDecoder = DecodeMSA128BRegisterClass;
-  } else if ((tmp & 0x1c) == 0x10) { // INSVE_H
-    NSize = 3;
-    RegDecoder = DecodeMSA128HRegisterClass;
-  } else if ((tmp & 0x1e) == 0x18) { // INSVE_W
-    NSize = 2;
-    RegDecoder = DecodeMSA128WRegisterClass;
-  } else if ((tmp & 0x1f) == 0x1c) { // INSVE_D
-    NSize = 1;
-    RegDecoder = DecodeMSA128DRegisterClass;
-  } else
-    llvm_unreachable("Invalid encoding");
-
-  assert(NSize != 0 && RegDecoder != nullptr);
-
-  // $wd
-  tmp = fieldFromInstruction(insn, 6, 5);
-  if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail)
-    return MCDisassembler::Fail;
-  // $wd_in
-  if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail)
-    return MCDisassembler::Fail;
-  // $n
-  tmp = fieldFromInstruction(insn, 16, NSize);
-  MI.addOperand(MCOperand::CreateImm(tmp));
-  // $ws
-  tmp = fieldFromInstruction(insn, 11, 5);
-  if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail)
-    return MCDisassembler::Fail;
-  // $n2
-  MI.addOperand(MCOperand::CreateImm(0));
 
-  return MCDisassembler::Success;
-}
+#include "MipsGenDisassemblerTables.inc"
 
   /// readInstruction - read four bytes from the MemoryObject
   /// and return 32 bit word sorted according to the given endianess