[mips] Removal of microMIPS64R6

All files and parts of files related to microMIPS4R6 are removed.
When target is microMIPS4R6, errors are printed.

This is LLVM part of patch.

Differential Revision: https://reviews.llvm.org/D35625

llvm-svn: 320350

1 files changed, 3 insertions, 31 deletions

diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
index d8e2eef6a9f..ef0f08b4985 100644
--- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
+++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
@@ -1068,26 +1068,16 @@ static DecodeStatus DecodeDEXT(MCInst &MI, InsnType Insn, uint64_t Address,
   unsigned Lsb = fieldFromInstruction(Insn, 6, 5);
   unsigned Size = 0;
   unsigned Pos = 0;
-  bool IsMicroMips = false;
 
   switch (MI.getOpcode()) {
-    case Mips::DEXT_MM64R6:
-      IsMicroMips = true;
-      LLVM_FALLTHROUGH;
     case Mips::DEXT:
       Pos = Lsb;
       Size = Msbd + 1;
       break;
-    case Mips::DEXTM_MM64R6:
-      IsMicroMips = true;
-      LLVM_FALLTHROUGH;
     case Mips::DEXTM:
       Pos = Lsb;
       Size = Msbd + 1 + 32;
       break;
-    case Mips::DEXTU_MM64R6:
-      IsMicroMips = true;
-      LLVM_FALLTHROUGH;
     case Mips::DEXTU:
       Pos = Lsb + 32;
       Size = Msbd + 1;
@@ -1096,14 +1086,10 @@ static DecodeStatus DecodeDEXT(MCInst &MI, InsnType Insn, uint64_t Address,
       llvm_unreachable("Unknown DEXT instruction!");
   }
 
-  MI.setOpcode(IsMicroMips ? Mips::DEXT_MM64R6 : Mips::DEXT);
+  MI.setOpcode(Mips::DEXT);
 
-  // Although the format of the instruction is similar, rs and rt are swapped
-  // for microMIPS64R6.
   InsnType Rs = fieldFromInstruction(Insn, 21, 5);
   InsnType Rt = fieldFromInstruction(Insn, 16, 5);
-  if (IsMicroMips)
-    std::swap(Rs, Rt);
 
   MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rt)));
   MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rs)));
@@ -1122,26 +1108,16 @@ static DecodeStatus DecodeDINS(MCInst &MI, InsnType Insn, uint64_t Address,
   unsigned Lsb = fieldFromInstruction(Insn, 6, 5);
   unsigned Size = 0;
   unsigned Pos = 0;
-  bool IsMicroMips = false;
 
   switch (MI.getOpcode()) {
-    case Mips::DINS_MM64R6:
-      IsMicroMips = true;
-      LLVM_FALLTHROUGH;
     case Mips::DINS:
       Pos = Lsb;
       Size = Msbd + 1 - Pos;
       break;
-    case Mips::DINSM_MM64R6:
-      IsMicroMips = true;
-      LLVM_FALLTHROUGH;
     case Mips::DINSM:
       Pos = Lsb;
       Size = Msbd + 33 - Pos;
       break;
-    case Mips::DINSU_MM64R6:
-      IsMicroMips = true;
-      LLVM_FALLTHROUGH;
     case Mips::DINSU:
       Pos = Lsb + 32;
       // mbsd = pos + size - 33
@@ -1152,14 +1128,10 @@ static DecodeStatus DecodeDINS(MCInst &MI, InsnType Insn, uint64_t Address,
       llvm_unreachable("Unknown DINS instruction!");
   }
 
-  // Although the format of the instruction is similar, rs and rt are swapped
-  // for microMIPS64R6.
   InsnType Rs = fieldFromInstruction(Insn, 21, 5);
   InsnType Rt = fieldFromInstruction(Insn, 16, 5);
-  if (IsMicroMips)
-    std::swap(Rs, Rt);
 
-  MI.setOpcode(IsMicroMips ? Mips::DINS_MM64R6 : Mips::DINS);
+  MI.setOpcode(Mips::DINS);
   MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rt)));
   MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rs)));
   MI.addOperand(MCOperand::createImm(Pos));
@@ -1240,7 +1212,7 @@ DecodeStatus MipsDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
     if (hasMips32r6()) {
       DEBUG(dbgs() << "Trying MicroMipsR616 table (16-bit instructions):\n");
       // Calling the auto-generated decoder function for microMIPS32R6
-      // (and microMIPS64R6) 16-bit instructions.
+      // 16-bit instructions.
       Result = decodeInstruction(DecoderTableMicroMipsR616, Instr, Insn,
                                  Address, this, STI);
       if (Result != MCDisassembler::Fail) {