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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2015-09-09 13:55:45 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2015-09-09 13:55:45 +0000 |
| commit | 6b28f09d679ef18cbd447957d1ac21068a3f4e8e (patch) | |
| tree | 3c5df7f4dbeadd9f11c06065f34836232b543769 /llvm/lib/Target/Mips/Disassembler | |
| parent | b9a68dbcaee014580b2f78d9a630635d7d5f5377 (diff) | |
| download | bcm5719-llvm-6b28f09d679ef18cbd447957d1ac21068a3f4e8e.tar.gz bcm5719-llvm-6b28f09d679ef18cbd447957d1ac21068a3f4e8e.zip | |
[mips][microMIPS] Implement ADDU16, AND16, ANDI16, NOT16, OR16, SLL16 and SRL16 instructions
Differential Revision: http://reviews.llvm.org/D11178
llvm-svn: 247146
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler')
| -rw-r--r-- | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index c51a4f0927a..1177c3fa1e6 100644 --- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -345,6 +345,11 @@ static DecodeStatus DecodeLiSimm7(MCInst &Inst, uint64_t Address, const void *Decoder); +static DecodeStatus DecodePOOL16BEncodedField(MCInst &Inst, + unsigned Value, + uint64_t Address, + const void *Decoder); + static DecodeStatus DecodeSimm4(MCInst &Inst, unsigned Value, uint64_t Address, @@ -1785,6 +1790,14 @@ static DecodeStatus DecodeLiSimm7(MCInst &Inst, return MCDisassembler::Success; } +static DecodeStatus DecodePOOL16BEncodedField(MCInst &Inst, + unsigned Value, + uint64_t Address, + const void *Decoder) { + Inst.addOperand(MCOperand::createImm(Value == 0x0 ? 8 : Value)); + return MCDisassembler::Success; +} + static DecodeStatus DecodeSimm4(MCInst &Inst, unsigned Value, uint64_t Address, |
