diff options
| author | Hrvoje Varga <Hrvoje.Varga@imgtec.com> | 2015-10-15 08:11:50 +0000 |
|---|---|---|
| committer | Hrvoje Varga <Hrvoje.Varga@imgtec.com> | 2015-10-15 08:11:50 +0000 |
| commit | 3ef4dd7bc88239070d52b62c6d598a9b3c7f7af8 (patch) | |
| tree | 5cd24e7465a8d849d06f4d7ef4e9b0308e694bdf /llvm/lib/Target/Mips/Disassembler | |
| parent | 736c741752316be98e1f608467b1bfe36c8af545 (diff) | |
| download | bcm5719-llvm-3ef4dd7bc88239070d52b62c6d598a9b3c7f7af8.tar.gz bcm5719-llvm-3ef4dd7bc88239070d52b62c6d598a9b3c7f7af8.zip | |
[mips][microMIPS] Implement LLE and SCE instructions
Differential Revision: http://reviews.llvm.org/D11630
llvm-svn: 250379
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler')
| -rw-r--r-- | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index 27eb399ba96..79268e5e184 100644 --- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -1411,6 +1411,9 @@ static DecodeStatus DecodeMemMMImm9(MCInst &Inst, Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); Base = getReg(Decoder, Mips::GPR32RegClassID, Base); + if (Inst.getOpcode() == Mips::SCE_MM) + Inst.addOperand(MCOperand::createReg(Reg)); + Inst.addOperand(MCOperand::createReg(Reg)); Inst.addOperand(MCOperand::createReg(Base)); Inst.addOperand(MCOperand::createImm(Offset)); |
