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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-03-14 11:16:56 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-03-14 11:16:56 +0000 |
| commit | 19b7f76afa319151ac697a7adf9ab12bc52fecfd (patch) | |
| tree | 6ed33e94ad319a10b8d6f632a4df7f0618f73986 /llvm/lib/Target/Mips/Disassembler | |
| parent | 369ebfe4c9c6526a981e85df87453bb1bc818df6 (diff) | |
| download | bcm5719-llvm-19b7f76afa319151ac697a7adf9ab12bc52fecfd.tar.gz bcm5719-llvm-19b7f76afa319151ac697a7adf9ab12bc52fecfd.zip | |
[mips] Range check uimm6_lsl2.
Summary:
Reviewers: vkalintiris
Subscribers: dsanders, llvm-commits
Differential Revision: http://reviews.llvm.org/D17291
llvm-svn: 263419
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler')
| -rw-r--r-- | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 42 |
1 files changed, 15 insertions, 27 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index 4c64fc812e7..a82d8f3afcd 100644 --- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -362,11 +362,6 @@ static DecodeStatus DecodeAddiur2Simm7(MCInst &Inst, uint64_t Address, const void *Decoder); -static DecodeStatus DecodeUImm6Lsl2(MCInst &Inst, - unsigned Value, - uint64_t Address, - const void *Decoder); - static DecodeStatus DecodeLiSimm7(MCInst &Inst, unsigned Value, uint64_t Address, @@ -382,9 +377,18 @@ static DecodeStatus DecodeSimm16(MCInst &Inst, uint64_t Address, const void *Decoder); +template <unsigned Bits, int Offset, int Scale> +static DecodeStatus DecodeUImmWithOffsetAndScale(MCInst &Inst, unsigned Value, + uint64_t Address, + const void *Decoder); + template <unsigned Bits, int Offset> static DecodeStatus DecodeUImmWithOffset(MCInst &Inst, unsigned Value, - uint64_t Address, const void *Decoder); + uint64_t Address, + const void *Decoder) { + return DecodeUImmWithOffsetAndScale<Bits, Offset, 1>(Inst, Value, Address, + Decoder); +} template <unsigned Bits, int Offset = 0> static DecodeStatus DecodeSImmWithOffset(MCInst &Inst, unsigned Value, @@ -407,9 +411,6 @@ static DecodeStatus DecodeSimm9SP(MCInst &Inst, unsigned Insn, static DecodeStatus DecodeANDI16Imm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder); -static DecodeStatus DecodeUImm5lsl2(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); - static DecodeStatus DecodeSimm23Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder); @@ -1896,14 +1897,6 @@ static DecodeStatus DecodeAddiur2Simm7(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeUImm6Lsl2(MCInst &Inst, - unsigned Value, - uint64_t Address, - const void *Decoder) { - Inst.addOperand(MCOperand::createImm(Value << 2)); - return MCDisassembler::Success; -} - static DecodeStatus DecodeLiSimm7(MCInst &Inst, unsigned Value, uint64_t Address, @@ -1931,11 +1924,12 @@ static DecodeStatus DecodeSimm16(MCInst &Inst, return MCDisassembler::Success; } -template <unsigned Bits, int Offset> -static DecodeStatus DecodeUImmWithOffset(MCInst &Inst, unsigned Value, - uint64_t Address, - const void *Decoder) { +template <unsigned Bits, int Offset, int Scale> +static DecodeStatus DecodeUImmWithOffsetAndScale(MCInst &Inst, unsigned Value, + uint64_t Address, + const void *Decoder) { Value &= ((1 << Bits) - 1); + Value *= Scale; Inst.addOperand(MCOperand::createImm(Value + Offset)); return MCDisassembler::Success; } @@ -1996,12 +1990,6 @@ static DecodeStatus DecodeANDI16Imm(MCInst &Inst, unsigned Insn, return MCDisassembler::Success; } -static DecodeStatus DecodeUImm5lsl2(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { - Inst.addOperand(MCOperand::createImm(Insn << 2)); - return MCDisassembler::Success; -} - static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Insn, uint64_t Address, |
