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authorJozef Kolek <jozef.kolek@imgtec.com>2014-12-23 16:16:33 +0000
committerJozef Kolek <jozef.kolek@imgtec.com>2014-12-23 16:16:33 +0000
commit12c6982b3b4c09a7ea1d6dcc39b6ff847c1710db (patch)
tree217ebe0d4ea4c71789747a4358ac47b2a71861de /llvm/lib/Target/Mips/Disassembler
parent43eba818cd2b03302d072f7fa0aa32bfa36fa3a8 (diff)
downloadbcm5719-llvm-12c6982b3b4c09a7ea1d6dcc39b6ff847c1710db.tar.gz
bcm5719-llvm-12c6982b3b4c09a7ea1d6dcc39b6ff847c1710db.zip
[mips][microMIPS] Implement LWSP and SWSP instructions
Differential Revision: http://reviews.llvm.org/D6416 llvm-svn: 224771
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler')
-rw-r--r--llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp21
1 files changed, 21 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
index 1b955f59dcf..f4f870bc4ec 100644
--- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
+++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
@@ -265,6 +265,11 @@ static DecodeStatus DecodeMemMMImm4(MCInst &Inst,
uint64_t Address,
const void *Decoder);
+static DecodeStatus DecodeMemMMSPImm5Lsl2(MCInst &Inst,
+ unsigned Insn,
+ uint64_t Address,
+ const void *Decoder);
+
static DecodeStatus DecodeMemMMImm12(MCInst &Inst,
unsigned Insn,
uint64_t Address,
@@ -1197,6 +1202,22 @@ static DecodeStatus DecodeMemMMImm4(MCInst &Inst,
return MCDisassembler::Success;
}
+static DecodeStatus DecodeMemMMSPImm5Lsl2(MCInst &Inst,
+ unsigned Insn,
+ uint64_t Address,
+ const void *Decoder) {
+ unsigned Offset = Insn & 0x1F;
+ unsigned Reg = fieldFromInstruction(Insn, 5, 5);
+
+ Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
+
+ Inst.addOperand(MCOperand::CreateReg(Reg));
+ Inst.addOperand(MCOperand::CreateReg(Mips::SP));
+ Inst.addOperand(MCOperand::CreateImm(Offset << 2));
+
+ return MCDisassembler::Success;
+}
+
static DecodeStatus DecodeMemMMImm12(MCInst &Inst,
unsigned Insn,
uint64_t Address,
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