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authorMichael Kuperstein <michael.m.kuperstein@intel.com>2015-02-19 11:38:11 +0000
committerMichael Kuperstein <michael.m.kuperstein@intel.com>2015-02-19 11:38:11 +0000
commitefd7a96d2e8ff886fb2a1bc755dd6355b2bb5f17 (patch)
treec0afe1a7e7975789a575b441ac8e4e988da8f49c /llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
parent9570ff94f7f19af86a5f0cf3ea2992173980b3d8 (diff)
downloadbcm5719-llvm-efd7a96d2e8ff886fb2a1bc755dd6355b2bb5f17.tar.gz
bcm5719-llvm-efd7a96d2e8ff886fb2a1bc755dd6355b2bb5f17.zip
Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures.
llvm-svn: 229841
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp')
-rw-r--r--llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp10
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
index c69a60b5d21..8849366e837 100644
--- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
+++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
@@ -36,16 +36,16 @@ class MipsDisassembler : public MCDisassembler {
public:
MipsDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, bool IsBigEndian)
: MCDisassembler(STI, Ctx),
- IsMicroMips(STI.getFeatureBits()[Mips::FeatureMicroMips]),
+ IsMicroMips(STI.getFeatureBits() & Mips::FeatureMicroMips),
IsBigEndian(IsBigEndian) {}
- bool hasMips3() const { return STI.getFeatureBits()[Mips::FeatureMips3]; }
- bool hasMips32() const { return STI.getFeatureBits()[Mips::FeatureMips32]; }
+ bool hasMips3() const { return STI.getFeatureBits() & Mips::FeatureMips3; }
+ bool hasMips32() const { return STI.getFeatureBits() & Mips::FeatureMips32; }
bool hasMips32r6() const {
- return STI.getFeatureBits()[Mips::FeatureMips32r6];
+ return STI.getFeatureBits() & Mips::FeatureMips32r6;
}
- bool isGP64() const { return STI.getFeatureBits()[Mips::FeatureGP64Bit]; }
+ bool isGP64() const { return STI.getFeatureBits() & Mips::FeatureGP64Bit; }
bool hasCOP3() const {
// Only present in MIPS-I and MIPS-II
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