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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-09-20 20:53:49 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-09-20 20:53:49 +0000 |
| commit | e135c4c6a6a495a8d5ea260c69ae2ed1666e5bfe (patch) | |
| tree | 9c73c8224c0a7d100ad2d21683342255ea0dbdc2 /llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | |
| parent | c9bbbe2403826d42b3d279eb998682d8d1b95d0d (diff) | |
| download | bcm5719-llvm-e135c4c6a6a495a8d5ea260c69ae2ed1666e5bfe.tar.gz bcm5719-llvm-e135c4c6a6a495a8d5ea260c69ae2ed1666e5bfe.zip | |
AMDGPU: Add tied operands to v_mad_mix{lo|hi}_f16
These write to the low and high half of the destination
register and leave the other 16-bits unchanged. This is true
for most 16-bit instructions on gfx9, but we don't use that
now.
llvm-svn: 313812
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions
