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author | Jozef Kolek <jozef.kolek@imgtec.com> | 2015-01-20 16:45:27 +0000 |
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committer | Jozef Kolek <jozef.kolek@imgtec.com> | 2015-01-20 16:45:27 +0000 |
commit | 45f7f9c1abc90ad9fd90012993b45a6fc6dec0f7 (patch) | |
tree | 61b492278eb1535946465fc063f2850ef69c70c7 /llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | |
parent | 4b8985b5452040f27990f38830af7ff9eb9f7007 (diff) | |
download | bcm5719-llvm-45f7f9c1abc90ad9fd90012993b45a6fc6dec0f7.tar.gz bcm5719-llvm-45f7f9c1abc90ad9fd90012993b45a6fc6dec0f7.zip |
[mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B
Implement microMIPS 16-bit unconditional branch instruction B.
Implemented 16-bit microMIPS unconditional instruction has real name B16, and
B is an alias which expands to either B16 or BEQ according to the rules:
b 256 --> b16 256 # R_MICROMIPS_PC10_S1
b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1
b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1
Differential Revision: http://reviews.llvm.org/D3514
llvm-svn: 226577
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp')
-rw-r--r-- | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index da33f3b913c..37168bce707 100644 --- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -235,6 +235,13 @@ static DecodeStatus DecodeBranchTarget7MM(MCInst &Inst, uint64_t Address, const void *Decoder); +// DecodeBranchTarget10MM - Decode microMIPS branch offset, which is +// shifted left by 1 bit. +static DecodeStatus DecodeBranchTarget10MM(MCInst &Inst, + unsigned Offset, + uint64_t Address, + const void *Decoder); + // DecodeBranchTargetMM - Decode microMIPS branch offset, which is // shifted left by 1 bit. static DecodeStatus DecodeBranchTargetMM(MCInst &Inst, @@ -1556,6 +1563,15 @@ static DecodeStatus DecodeBranchTarget7MM(MCInst &Inst, return MCDisassembler::Success; } +static DecodeStatus DecodeBranchTarget10MM(MCInst &Inst, + unsigned Offset, + uint64_t Address, + const void *Decoder) { + int32_t BranchOffset = SignExtend32<10>(Offset) << 1; + Inst.addOperand(MCOperand::CreateImm(BranchOffset)); + return MCDisassembler::Success; +} + static DecodeStatus DecodeBranchTargetMM(MCInst &Inst, unsigned Offset, uint64_t Address, |