diff options
| author | Jack Carter <jcarter@mips.com> | 2013-01-17 00:28:20 +0000 |
|---|---|---|
| committer | Jack Carter <jcarter@mips.com> | 2013-01-17 00:28:20 +0000 |
| commit | 2a74a87b713d58055782110e3a39a761c3d2be6a (patch) | |
| tree | 416f9fc718ef60d73ef6061bad5c4f66e28fa723 /llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | |
| parent | ae73417b69556d3abf94ed0d8e7414dcfe2faccb (diff) | |
| download | bcm5719-llvm-2a74a87b713d58055782110e3a39a761c3d2be6a.tar.gz bcm5719-llvm-2a74a87b713d58055782110e3a39a761c3d2be6a.zip | |
This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.
The Mips RDHWR (Read Hardware Register) instruction was not
tested for assembler or dissassembler consumption. This patch
adds that functionality.
Contributer: Vladimir Medic
llvm-svn: 172685
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index 1efeffd3281..9560f3fc524 100644 --- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -128,6 +128,11 @@ static DecodeStatus DecodeAFGR64RegisterClass(MCInst &Inst, uint64_t Address, const void *Decoder); +static DecodeStatus DecodeHWRegs64RegisterClass(MCInst &Inst, + unsigned Insn, + uint64_t Address, + const void *Decoder); + static DecodeStatus DecodeACRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, @@ -454,6 +459,17 @@ static DecodeStatus DecodeAFGR64RegisterClass(MCInst &Inst, return MCDisassembler::Success; } +static DecodeStatus DecodeHWRegs64RegisterClass(MCInst &Inst, + unsigned RegNo, + uint64_t Address, + const void *Decoder) { + //Currently only hardware register 29 is supported + if (RegNo != 29) + return MCDisassembler::Fail; + Inst.addOperand(MCOperand::CreateReg(Mips::HWR29_64)); + return MCDisassembler::Success; +} + static DecodeStatus DecodeACRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, |
