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authorNico Weber <nicolasweber@gmx.de>2016-09-13 18:17:00 +0000
committerNico Weber <nicolasweber@gmx.de>2016-09-13 18:17:00 +0000
commite204c48d164d0148a008b3f97bdcc5ccaa3d7d39 (patch)
tree82400f3e973ff3afe27361021f019f41c2a192c9 /llvm/lib/Target/Mips/AsmParser
parent4e4fbe821119fd168f3dd65fc88fa4220f6826fe (diff)
downloadbcm5719-llvm-e204c48d164d0148a008b3f97bdcc5ccaa3d7d39.tar.gz
bcm5719-llvm-e204c48d164d0148a008b3f97bdcc5ccaa3d7d39.zip
Revert r281336 (and r281337), it caused PR30372.
llvm-svn: 281361
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser')
-rw-r--r--llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp60
1 files changed, 40 insertions, 20 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 58562f99d5f..cdbf4a62c8c 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -924,11 +924,9 @@ public:
assert(N == 1 && "Invalid number of operands!");
Inst.addOperand(MCOperand::createReg(getFGR32Reg()));
// FIXME: We ought to do this for -integrated-as without -via-file-asm too.
- // FIXME: This should propagate failure up to parseStatement.
if (!AsmParser.useOddSPReg() && RegIdx.Index & 1)
- AsmParser.getParser().printError(
- StartLoc, "-mno-odd-spreg prohibits the use of odd FPU "
- "registers");
+ AsmParser.Error(StartLoc, "-mno-odd-spreg prohibits the use of odd FPU "
+ "registers");
}
void addFGRH32AsmRegOperands(MCInst &Inst, unsigned N) const {
@@ -1862,7 +1860,7 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
if (MemOffset < -32768 || MemOffset > 32767) {
// Offset can't exceed 16bit value.
expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad(), true);
- return getParser().hasPendingError();
+ return false;
}
} else if (Op.isExpr()) {
const MCExpr *Expr = Op.getExpr();
@@ -1872,11 +1870,11 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
if (SR->getKind() == MCSymbolRefExpr::VK_None) {
// Expand symbol.
expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad(), false);
- return getParser().hasPendingError();
+ return false;
}
} else if (!isEvaluated(Expr)) {
expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad(), false);
- return getParser().hasPendingError();
+ return false;
}
}
}
@@ -2468,7 +2466,6 @@ bool MipsAsmParser::expandLoadAddress(unsigned DstReg, unsigned BaseReg,
Error(IDLoc, "la used to load 64-bit address");
// Continue as if we had 'dla' instead.
Is32BitAddress = false;
- return true;
}
// dla requires 64-bit addresses.
@@ -2695,9 +2692,9 @@ bool MipsAsmParser::expandUncondBranchMMPseudo(MCInst &Inst, SMLoc IDLoc,
Inst.setOpcode(hasMips32r6() ? Mips::BC16_MMR6 : Mips::B16_MM);
} else {
if (!isInt<17>(Offset.getImm()))
- return Error(IDLoc, "branch target out of range");
+ Error(IDLoc, "branch target out of range");
if (OffsetToAlignment(Offset.getImm(), 1LL << 1))
- return Error(IDLoc, "branch to misaligned address");
+ Error(IDLoc, "branch to misaligned address");
Inst.clear();
Inst.setOpcode(Mips::BEQ_MM);
Inst.addOperand(MCOperand::createReg(Mips::ZERO));
@@ -3305,7 +3302,8 @@ bool MipsAsmParser::expandUlh(MCInst &Inst, bool Signed, SMLoc IDLoc,
MipsTargetStreamer &TOut = getTargetStreamer();
if (hasMips32r6() || hasMips64r6()) {
- return Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
+ Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
+ return false;
}
warnIfNoMacro(IDLoc);
@@ -3382,8 +3380,10 @@ bool MipsAsmParser::expandUlw(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
const MCSubtargetInfo *STI) {
MipsTargetStreamer &TOut = getTargetStreamer();
- if (hasMips32r6() || hasMips64r6())
- return Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
+ if (hasMips32r6() || hasMips64r6()) {
+ Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
+ return false;
+ }
const MCOperand &DstRegOp = Inst.getOperand(0);
assert(DstRegOp.isReg() && "expected register operand kind");
@@ -4817,10 +4817,12 @@ bool MipsAsmParser::parseParenSuffix(StringRef Name, OperandVector &Operands) {
Parser.Lex();
if (parseOperand(Operands, Name)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token in argument list");
}
if (Parser.getTok().isNot(AsmToken::RParen)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token, expected ')'");
}
Operands.push_back(
@@ -4845,10 +4847,12 @@ bool MipsAsmParser::parseBracketSuffix(StringRef Name,
Parser.Lex();
if (parseOperand(Operands, Name)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token in argument list");
}
if (Parser.getTok().isNot(AsmToken::RBrac)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token, expected ']'");
}
Operands.push_back(
@@ -4868,6 +4872,7 @@ bool MipsAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
// Check if we have valid mnemonic
if (!mnemonicIsValid(Name, 0)) {
+ Parser.eatToEndOfStatement();
return Error(NameLoc, "unknown instruction");
}
// First operand in MCInst is instruction mnemonic.
@@ -4878,6 +4883,7 @@ bool MipsAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
// Read the first operand.
if (parseOperand(Operands, Name)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token in argument list");
}
if (getLexer().is(AsmToken::LBrac) && parseBracketSuffix(Name, Operands))
@@ -4889,6 +4895,7 @@ bool MipsAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
// Parse and remember the operand.
if (parseOperand(Operands, Name)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token in argument list");
}
// Parse bracket and parenthesis suffixes before we iterate
@@ -4902,6 +4909,7 @@ bool MipsAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
}
if (getLexer().isNot(AsmToken::EndOfStatement)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, "unexpected token in argument list");
}
Parser.Lex(); // Consume the EndOfStatement.
@@ -4911,7 +4919,9 @@ bool MipsAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
// FIXME: Given that these have the same name, these should both be
// consistent on affecting the Parser.
bool MipsAsmParser::reportParseError(Twine ErrorMsg) {
+ MCAsmParser &Parser = getParser();
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, ErrorMsg);
}
@@ -5412,6 +5422,7 @@ bool MipsAsmParser::eatComma(StringRef ErrorStr) {
MCAsmParser &Parser = getParser();
if (getLexer().isNot(AsmToken::Comma)) {
SMLoc Loc = getLexer().getLoc();
+ Parser.eatToEndOfStatement();
return Error(Loc, ErrorStr);
}
@@ -5520,6 +5531,7 @@ bool MipsAsmParser::parseDirectiveCPSetup() {
MipsOperand &FuncRegOpnd = static_cast<MipsOperand &>(*TmpReg[0]);
if (!FuncRegOpnd.isGPRAsmReg()) {
reportParseError(FuncRegOpnd.getStartLoc(), "invalid register");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -5538,6 +5550,7 @@ bool MipsAsmParser::parseDirectiveCPSetup() {
if (Parser.parseExpression(OffsetExpr) ||
!OffsetExpr->evaluateAsAbsolute(OffsetVal)) {
reportParseError(ExprLoc, "expected save register or stack offset");
+ Parser.eatToEndOfStatement();
return false;
}
@@ -5547,6 +5560,7 @@ bool MipsAsmParser::parseDirectiveCPSetup() {
MipsOperand &SaveOpnd = static_cast<MipsOperand &>(*TmpReg[0]);
if (!SaveOpnd.isGPRAsmReg()) {
reportParseError(SaveOpnd.getStartLoc(), "invalid register");
+ Parser.eatToEndOfStatement();
return false;
}
Save = SaveOpnd.getGPR32Reg();
@@ -5834,8 +5848,9 @@ bool MipsAsmParser::parseDirectiveOption() {
AsmToken Tok = Parser.getTok();
// At the moment only identifiers are supported.
if (Tok.isNot(AsmToken::Identifier)) {
- return Error(Parser.getTok().getLoc(),
- "unexpected token, expected identifier");
+ Error(Parser.getTok().getLoc(), "unexpected token, expected identifier");
+ Parser.eatToEndOfStatement();
+ return false;
}
StringRef Option = Tok.getIdentifier();
@@ -5847,8 +5862,9 @@ bool MipsAsmParser::parseDirectiveOption() {
getTargetStreamer().emitDirectiveOptionPic0();
Parser.Lex();
if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
- return Error(Parser.getTok().getLoc(),
- "unexpected token, expected end of statement");
+ Error(Parser.getTok().getLoc(),
+ "unexpected token, expected end of statement");
+ Parser.eatToEndOfStatement();
}
return false;
}
@@ -5860,8 +5876,9 @@ bool MipsAsmParser::parseDirectiveOption() {
getTargetStreamer().emitDirectiveOptionPic2();
Parser.Lex();
if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
- return Error(Parser.getTok().getLoc(),
- "unexpected token, expected end of statement");
+ Error(Parser.getTok().getLoc(),
+ "unexpected token, expected end of statement");
+ Parser.eatToEndOfStatement();
}
return false;
}
@@ -5952,7 +5969,8 @@ bool MipsAsmParser::parseDirectiveModule() {
return false; // parseDirectiveModule has finished successfully.
} else if (Option == "nooddspreg") {
if (!isABI_O32()) {
- return Error(L, "'.module nooddspreg' requires the O32 ABI");
+ Error(L, "'.module nooddspreg' requires the O32 ABI");
+ return false;
}
setModuleFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
@@ -6413,6 +6431,8 @@ bool MipsAsmParser::ParseDirective(AsmToken DirectiveID) {
if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
Error(Parser.getTok().getLoc(),
"unexpected token, expected end of statement");
+ // Clear line
+ Parser.eatToEndOfStatement();
}
return false;
}
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