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authorSimon Dardis <simon.dardis@imgtec.com>2016-09-16 13:50:43 +0000
committerSimon Dardis <simon.dardis@imgtec.com>2016-09-16 13:50:43 +0000
commitcf060794cd4da110c96530f437f2f2586347b1f3 (patch)
treef6143302de154a4a2a1d110c84d214ec7ef7e0b7 /llvm/lib/Target/Mips/AsmParser
parentceae630c9b6f2f3ef9534efc733109ea1007de06 (diff)
downloadbcm5719-llvm-cf060794cd4da110c96530f437f2f2586347b1f3.tar.gz
bcm5719-llvm-cf060794cd4da110c96530f437f2f2586347b1f3.zip
[mips] Fix aui/daui/dahi/dati for MIPSR6
For compatiblity with binutils, define these instructions to take two registers with a 16bit unsigned immediate. Both of the registers have to be same for dahi and dati. Reviewers: vkalintiris, dsanders, zoran.jovanovic Differential Review: https://reviews.llvm.org/D21473 llvm-svn: 281724
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser')
-rw-r--r--llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp10
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index cdbf4a62c8c..600316acaeb 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -3824,6 +3824,8 @@ MipsAsmParser::checkEarlyTargetMatchPredicate(MCInst &Inst,
return Match_Success;
case Mips::DATI:
case Mips::DAHI:
+ case Mips::DATI_MM64R6:
+ case Mips::DAHI_MM64R6:
if (static_cast<MipsOperand &>(*Operands[1])
.isValidForTie(static_cast<MipsOperand &>(*Operands[2])))
return Match_Success;
@@ -3832,6 +3834,14 @@ MipsAsmParser::checkEarlyTargetMatchPredicate(MCInst &Inst,
}
unsigned MipsAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
switch (Inst.getOpcode()) {
+ // As described by the MIPSR6 spec, daui must not use the zero operand for
+ // its source operand.
+ case Mips::DAUI:
+ case Mips::DAUI_MM64R6:
+ if (Inst.getOperand(1).getReg() == Mips::ZERO ||
+ Inst.getOperand(1).getReg() == Mips::ZERO_64)
+ return Match_RequiresNoZeroRegister;
+ return Match_Success;
// As described by the Mips32r2 spec, the registers Rd and Rs for
// jalr.hb must be different.
// It also applies for registers Rt and Rs of microMIPSr6 jalrc.hb instruction
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