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authorSimon Dardis <simon.dardis@imgtec.com>2016-10-05 15:28:33 +0000
committerSimon Dardis <simon.dardis@imgtec.com>2016-10-05 15:28:33 +0000
commitbbfd5287489fe2a55d71097c6e4914ace20d7d7f (patch)
tree02a009dc939f55be1b9640ab4834e191b0b70970 /llvm/lib/Target/Mips/AsmParser
parent0411e8669b82233a645fd6dcdc813e989eef25c6 (diff)
downloadbcm5719-llvm-bbfd5287489fe2a55d71097c6e4914ace20d7d7f.tar.gz
bcm5719-llvm-bbfd5287489fe2a55d71097c6e4914ace20d7d7f.zip
Revert "[mips] Add rsqrt, recip for MIPS"
This reverts commit r282485 which contain two patches instead of one. llvm-svn: 283327
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser')
-rw-r--r--llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp12
1 files changed, 3 insertions, 9 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index e4b2a40fba6..58562f99d5f 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -995,7 +995,7 @@ public:
void addConstantUImmOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
uint64_t Imm = getConstantImm() - Offset;
- Imm &= (1ULL << Bits) - 1;
+ Imm &= (1 << Bits) - 1;
Imm += Offset;
Imm += AdjustOffset;
Inst.addOperand(MCOperand::createImm(Imm));
@@ -1093,8 +1093,7 @@ public:
bool isRegIdx() const { return Kind == k_RegisterIndex; }
bool isImm() const override { return Kind == k_Immediate; }
bool isConstantImm() const {
- int64_t Res;
- return isImm() && getImm()->evaluateAsAbsolute(Res);
+ return isImm() && isa<MCConstantExpr>(getImm());
}
bool isConstantImmz() const {
return isConstantImm() && getConstantImm() == 0;
@@ -1265,9 +1264,7 @@ public:
int64_t getConstantImm() const {
const MCExpr *Val = getImm();
- int64_t Value = 0;
- (void)Val->evaluateAsAbsolute(Value);
- return Value;
+ return static_cast<const MCConstantExpr *>(Val)->getValue();
}
MipsOperand *getMemBase() const {
@@ -4054,9 +4051,6 @@ bool MipsAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
case Match_SImm32_Relaxed:
return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
"expected 32-bit signed immediate");
- case Match_UImm32_Coerced:
- return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
- "expected 32-bit immediate");
case Match_MemSImm9:
return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
"expected memory with 9-bit signed offset");
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