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authorRafael Espindola <rafael.espindola@gmail.com>2016-06-21 21:51:41 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2016-06-21 21:51:41 +0000
commit7b4ef068c6f5e1199f37b6f8a2881491b0cc09db (patch)
tree53c218243a765627310a6acb4a07e5f26c7a8fbc /llvm/lib/Target/Mips/AsmParser
parenta7484c91802796cf80d5286e8dd41c76674b3ca3 (diff)
downloadbcm5719-llvm-7b4ef068c6f5e1199f37b6f8a2881491b0cc09db.tar.gz
bcm5719-llvm-7b4ef068c6f5e1199f37b6f8a2881491b0cc09db.zip
Delete more dead code.
Found by gcc 6. llvm-svn: 273322
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser')
-rw-r--r--llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp51
1 files changed, 0 insertions, 51 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index f6c2e5bb247..2ab78490c5a 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -158,7 +158,6 @@ class MipsAsmParser : public MCTargetAsmParser {
OperandMatchResultTy parseImm(OperandVector &Operands);
OperandMatchResultTy parseJumpTarget(OperandVector &Operands);
OperandMatchResultTy parseInvNum(OperandVector &Operands);
- OperandMatchResultTy parseLSAImm(OperandVector &Operands);
OperandMatchResultTy parseRegisterPair(OperandVector &Operands);
OperandMatchResultTy parseMovePRegPair(OperandVector &Operands);
OperandMatchResultTy parseRegisterList(OperandVector &Operands);
@@ -306,8 +305,6 @@ class MipsAsmParser : public MCTargetAsmParser {
int matchHWRegsRegisterName(StringRef Symbol);
- int matchRegisterByNumber(unsigned RegNum, unsigned RegClass);
-
int matchFPURegisterName(StringRef Name);
int matchFCCRegisterName(StringRef Name);
@@ -4122,14 +4119,6 @@ unsigned MipsAsmParser::getReg(int RC, int RegNo) {
return *(getContext().getRegisterInfo()->getRegClass(RC).begin() + RegNo);
}
-int MipsAsmParser::matchRegisterByNumber(unsigned RegNum, unsigned RegClass) {
- if (RegNum >
- getContext().getRegisterInfo()->getRegClass(RegClass).getNumRegs() - 1)
- return -1;
-
- return getReg(RegClass, RegNum);
-}
-
bool MipsAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) {
MCAsmParser &Parser = getParser();
DEBUG(dbgs() << "parseOperand\n");
@@ -4663,46 +4652,6 @@ MipsAsmParser::parseInvNum(OperandVector &Operands) {
}
MipsAsmParser::OperandMatchResultTy
-MipsAsmParser::parseLSAImm(OperandVector &Operands) {
- MCAsmParser &Parser = getParser();
- switch (getLexer().getKind()) {
- default:
- return MatchOperand_NoMatch;
- case AsmToken::LParen:
- case AsmToken::Plus:
- case AsmToken::Minus:
- case AsmToken::Integer:
- break;
- }
-
- const MCExpr *Expr;
- SMLoc S = Parser.getTok().getLoc();
-
- if (getParser().parseExpression(Expr))
- return MatchOperand_ParseFail;
-
- int64_t Val;
- if (!Expr->evaluateAsAbsolute(Val)) {
- Error(S, "expected immediate value");
- return MatchOperand_ParseFail;
- }
-
- // The LSA instruction allows a 2-bit unsigned immediate. For this reason
- // and because the CPU always adds one to the immediate field, the allowed
- // range becomes 1..4. We'll only check the range here and will deal
- // with the addition/subtraction when actually decoding/encoding
- // the instruction.
- if (Val < 1 || Val > 4) {
- Error(S, "immediate not in range (1..4)");
- return MatchOperand_ParseFail;
- }
-
- Operands.push_back(
- MipsOperand::CreateImm(Expr, S, Parser.getTok().getLoc(), *this));
- return MatchOperand_Success;
-}
-
-MipsAsmParser::OperandMatchResultTy
MipsAsmParser::parseRegisterList(OperandVector &Operands) {
MCAsmParser &Parser = getParser();
SmallVector<unsigned, 10> Regs;
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