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author | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-06-03 09:53:06 +0000 |
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committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-06-03 09:53:06 +0000 |
commit | 6ba3dd6b719ec740dd54b324bbab40ff25a21642 (patch) | |
tree | 37a0953a3558db176da2f05605b9efdcb3a7469f /llvm/lib/Target/Mips/AsmParser | |
parent | 5bc39ab5925f7b6e312f22481c679d93238824b8 (diff) | |
download | bcm5719-llvm-6ba3dd6b719ec740dd54b324bbab40ff25a21642.tar.gz bcm5719-llvm-6ba3dd6b719ec740dd54b324bbab40ff25a21642.zip |
[mips] Implement 'la' macro in PIC mode for O32.
Summary:
N32 support will follow in a later patch since the symbol version of 'la'
incorrectly believes N32 to have 64-bit pointers and rejects it early.
This fixes the three incorrectly expanded 'la' macros found in bionic.
Reviewers: sdardis
Subscribers: dsanders, llvm-commits, sdardis
Differential Revision: http://reviews.llvm.org/D20820
llvm-svn: 271644
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser')
-rw-r--r-- | llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 84 |
1 files changed, 77 insertions, 7 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 7c77d31aae9..94f09a95d36 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -2376,15 +2376,85 @@ bool MipsAsmParser::loadAndAddSymbolAddress(const MCExpr *SymExpr, MCStreamer &Out, const MCSubtargetInfo *STI) { MipsTargetStreamer &TOut = getTargetStreamer(); + bool UseSrcReg = SrcReg != Mips::NoRegister; warnIfNoMacro(IDLoc); - const MCExpr *Symbol = cast<MCExpr>(SymExpr); + if (inPicMode() && ABI.IsO32()) { + MCValue Res; + if (!SymExpr->evaluateAsRelocatable(Res, nullptr, nullptr)) { + Error(IDLoc, "expected relocatable expression"); + return true; + } + if (Res.getSymB() != nullptr) { + Error(IDLoc, "expected relocatable expression with only one symbol"); + return true; + } + + // The case where the result register is $25 is somewhat special. If the + // symbol in the final relocation is external and not modified with a + // constant then we must use R_MIPS_CALL16 instead of R_MIPS_GOT16. + if ((DstReg == Mips::T9 || DstReg == Mips::T9_64) && !UseSrcReg && + Res.getConstant() == 0 && !Res.getSymA()->getSymbol().isInSection() && + !Res.getSymA()->getSymbol().isTemporary()) { + const MCExpr *CallExpr = + MipsMCExpr::create(MipsMCExpr::MEK_GOT_CALL, SymExpr, getContext()); + TOut.emitRRX(Mips::LW, DstReg, ABI.GetGlobalPtr(), + MCOperand::createExpr(CallExpr), IDLoc, STI); + return false; + } + + // The remaining cases are: + // External GOT: lw $tmp, %got(symbol+offset)($gp) + // >addiu $tmp, $tmp, %lo(offset) + // >addiu $rd, $tmp, $rs + // Local GOT: lw $tmp, %got(symbol+offset)($gp) + // addiu $tmp, $tmp, %lo(symbol+offset)($gp) + // >addiu $rd, $tmp, $rs + // The addiu's marked with a '>' may be omitted if they are redundant. If + // this happens then the last instruction must use $rd as the result + // register. + const MipsMCExpr *GotExpr = + MipsMCExpr::create(MipsMCExpr::MEK_GOT, SymExpr, getContext()); + const MCExpr *LoExpr = nullptr; + if (Res.getSymA()->getSymbol().isInSection() || + Res.getSymA()->getSymbol().isTemporary()) + LoExpr = MipsMCExpr::create(MipsMCExpr::MEK_LO, SymExpr, getContext()); + else if (Res.getConstant() != 0) { + // External symbols fully resolve the symbol with just the %got(symbol) + // but we must still account for any offset to the symbol for expressions + // like symbol+8. + LoExpr = MCConstantExpr::create(Res.getConstant(), getContext()); + } + + unsigned TmpReg = DstReg; + if (UseSrcReg && + getContext().getRegisterInfo()->isSuperOrSubRegisterEq(DstReg, + SrcReg)) { + // If $rs is the same as $rd, we need to use AT. + // If it is not available we exit. + unsigned ATReg = getATReg(IDLoc); + if (!ATReg) + return true; + TmpReg = ATReg; + } + + TOut.emitRRX(Mips::LW, TmpReg, ABI.GetGlobalPtr(), + MCOperand::createExpr(GotExpr), IDLoc, STI); + + if (LoExpr) + TOut.emitRRX(Mips::ADDiu, TmpReg, TmpReg, MCOperand::createExpr(LoExpr), + IDLoc, STI); + + if (UseSrcReg) + TOut.emitRRR(Mips::ADDu, DstReg, TmpReg, SrcReg, IDLoc, STI); + + return false; + } + const MipsMCExpr *HiExpr = - MipsMCExpr::create(MipsMCExpr::MEK_HI, Symbol, getContext()); + MipsMCExpr::create(MipsMCExpr::MEK_HI, SymExpr, getContext()); const MipsMCExpr *LoExpr = - MipsMCExpr::create(MipsMCExpr::MEK_LO, Symbol, getContext()); - - bool UseSrcReg = SrcReg != Mips::NoRegister; + MipsMCExpr::create(MipsMCExpr::MEK_LO, SymExpr, getContext()); // This is the 64-bit symbol address expansion. if (ABI.ArePtrs64bit() && isGP64bit()) { @@ -2395,9 +2465,9 @@ bool MipsAsmParser::loadAndAddSymbolAddress(const MCExpr *SymExpr, return true; const MipsMCExpr *HighestExpr = - MipsMCExpr::create(MipsMCExpr::MEK_HIGHEST, Symbol, getContext()); + MipsMCExpr::create(MipsMCExpr::MEK_HIGHEST, SymExpr, getContext()); const MipsMCExpr *HigherExpr = - MipsMCExpr::create(MipsMCExpr::MEK_HIGHER, Symbol, getContext()); + MipsMCExpr::create(MipsMCExpr::MEK_HIGHER, SymExpr, getContext()); if (UseSrcReg && getContext().getRegisterInfo()->isSuperOrSubRegisterEq(DstReg, |