summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Mips/AsmParser
diff options
context:
space:
mode:
authorZlatko Buljan <Zlatko.Buljan@imgtec.com>2016-04-29 08:36:54 +0000
committerZlatko Buljan <Zlatko.Buljan@imgtec.com>2016-04-29 08:36:54 +0000
commit531809d3401cb767993a91100688f6e3a110fcc9 (patch)
tree01d06d1cf7415890fc25bc36924a8e3b61c4400f /llvm/lib/Target/Mips/AsmParser
parentfadc6db03679dc7aeeac17a0ca184bf9d93659c7 (diff)
downloadbcm5719-llvm-531809d3401cb767993a91100688f6e3a110fcc9.tar.gz
bcm5719-llvm-531809d3401cb767993a91100688f6e3a110fcc9.zip
[mips][microMIPS] Fix offsets for LLE, LWE, SBE, SCE and SHE instructions
Differential Revision: http://reviews.llvm.org/D18645 llvm-svn: 268012
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser')
-rw-r--r--llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp7
1 files changed, 0 insertions, 7 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index cb3a5918c7e..939eb70caee 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -1072,10 +1072,6 @@ public:
isShiftedInt<Bits, ShiftAmount>(getConstantMemOff()) &&
getMemBase()->isGPRAsmReg();
}
- template <unsigned Bits> bool isMemWithSimmOffsetGPR() const {
- return isMem() && isConstantMemOff() && isInt<Bits>(getConstantMemOff()) &&
- getMemBase()->isGPRAsmReg();
- }
bool isMemWithGRPMM16Base() const {
return isMem() && getMemBase()->isMM16AsmReg();
}
@@ -3815,9 +3811,6 @@ bool MipsAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
case Match_MemSImm9:
return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
"expected memory with 9-bit signed offset");
- case Match_MemGPSImm9:
- return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
- "expected memory with $gp and 9-bit signed offset");
case Match_MemSImm10:
return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
"expected memory with 10-bit signed offset");
OpenPOWER on IntegriCloud