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authorToma Tabacu <toma.tabacu@gmail.com>2015-06-30 12:41:33 +0000
committerToma Tabacu <toma.tabacu@gmail.com>2015-06-30 12:41:33 +0000
commitfc97d8a95a9624bbb4378f3f6fc12f37f183ddac (patch)
tree79c997dfcec0e5ad93226f08c340d5f6b54fb21b /llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
parent86ecbb7b543e1d4083ab0add6364d27381d70fef (diff)
downloadbcm5719-llvm-fc97d8a95a9624bbb4378f3f6fc12f37f183ddac.tar.gz
bcm5719-llvm-fc97d8a95a9624bbb4378f3f6fc12f37f183ddac.zip
[mips] [IAS] Make .module directives change AssemblerOptions->front().
Differential Revision: http://reviews.llvm.org/D10643 llvm-svn: 241062
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp')
-rw-r--r--llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp42
1 files changed, 34 insertions, 8 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 8f7968939cb..a5037346acd 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -361,6 +361,16 @@ class MipsAsmParser : public MCTargetAsmParser {
}
}
+ void setModuleFeatureBits(uint64_t Feature, StringRef FeatureString) {
+ setFeatureBits(Feature, FeatureString);
+ AssemblerOptions.front()->setFeatures(STI.getFeatureBits());
+ }
+
+ void clearModuleFeatureBits(uint64_t Feature, StringRef FeatureString) {
+ clearFeatureBits(Feature, FeatureString);
+ AssemblerOptions.front()->setFeatures(STI.getFeatureBits());
+ }
+
public:
enum MipsMatchResultTy {
Match_RequiresDifferentSrcAndDst = FIRST_TARGET_MATCH_RESULT_TY
@@ -4711,7 +4721,7 @@ bool MipsAsmParser::parseDirectiveModule() {
}
if (Option == "oddspreg") {
- clearFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
+ clearModuleFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
// Synchronize the abiflags information with the FeatureBits information we
// changed above.
@@ -4735,7 +4745,7 @@ bool MipsAsmParser::parseDirectiveModule() {
return false;
}
- setFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
+ setModuleFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
// Synchronize the abiflags information with the FeatureBits information we
// changed above.
@@ -4800,6 +4810,7 @@ bool MipsAsmParser::parseFpABIValue(MipsABIFlagsSection::FpABIKind &FpABI,
StringRef Directive) {
MCAsmParser &Parser = getParser();
MCAsmLexer &Lexer = getLexer();
+ bool ModuleLevelOptions = Directive == ".module";
if (Lexer.is(AsmToken::Identifier)) {
StringRef Value = Parser.getTok().getString();
@@ -4816,8 +4827,13 @@ bool MipsAsmParser::parseFpABIValue(MipsABIFlagsSection::FpABIKind &FpABI,
}
FpABI = MipsABIFlagsSection::FpABIKind::XX;
- setFeatureBits(Mips::FeatureFPXX, "fpxx");
- clearFeatureBits(Mips::FeatureFP64Bit, "fp64");
+ if (ModuleLevelOptions) {
+ setModuleFeatureBits(Mips::FeatureFPXX, "fpxx");
+ clearModuleFeatureBits(Mips::FeatureFP64Bit, "fp64");
+ } else {
+ setFeatureBits(Mips::FeatureFPXX, "fpxx");
+ clearFeatureBits(Mips::FeatureFP64Bit, "fp64");
+ }
return true;
}
@@ -4837,12 +4853,22 @@ bool MipsAsmParser::parseFpABIValue(MipsABIFlagsSection::FpABIKind &FpABI,
}
FpABI = MipsABIFlagsSection::FpABIKind::S32;
- clearFeatureBits(Mips::FeatureFPXX, "fpxx");
- clearFeatureBits(Mips::FeatureFP64Bit, "fp64");
+ if (ModuleLevelOptions) {
+ clearModuleFeatureBits(Mips::FeatureFPXX, "fpxx");
+ clearModuleFeatureBits(Mips::FeatureFP64Bit, "fp64");
+ } else {
+ clearFeatureBits(Mips::FeatureFPXX, "fpxx");
+ clearFeatureBits(Mips::FeatureFP64Bit, "fp64");
+ }
} else {
FpABI = MipsABIFlagsSection::FpABIKind::S64;
- clearFeatureBits(Mips::FeatureFPXX, "fpxx");
- setFeatureBits(Mips::FeatureFP64Bit, "fp64");
+ if (ModuleLevelOptions) {
+ clearModuleFeatureBits(Mips::FeatureFPXX, "fpxx");
+ setModuleFeatureBits(Mips::FeatureFP64Bit, "fp64");
+ } else {
+ clearFeatureBits(Mips::FeatureFPXX, "fpxx");
+ setFeatureBits(Mips::FeatureFP64Bit, "fp64");
+ }
}
return true;
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