diff options
author | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-03-31 14:12:01 +0000 |
---|---|---|
committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-03-31 14:12:01 +0000 |
commit | dc0602a2c20a3f514541165a19cb1534597c5dc6 (patch) | |
tree | 10a18a4ec13c3de1745a34f0ba8742bca9958561 /llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | |
parent | 83ce54aac2a886f3bbbed5da892abefba8060a33 (diff) | |
download | bcm5719-llvm-dc0602a2c20a3f514541165a19cb1534597c5dc6.tar.gz bcm5719-llvm-dc0602a2c20a3f514541165a19cb1534597c5dc6.zip |
[mips] Split mem_msa into range checked mem_simm10 and mem_simm10_lsl[123]
Summary:
Also, made test_mi10.s formatting consistent with the majority of the
MC tests.
Reviewers: vkalintiris
Subscribers: dsanders, llvm-commits
Differential Revision: http://reviews.llvm.org/D18435
llvm-svn: 265014
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp')
-rw-r--r-- | llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index b4cf847f0c5..28337537488 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -1055,9 +1055,11 @@ public: bool isConstantMemOff() const { return isMem() && isa<MCConstantExpr>(getMemOff()); } - template <unsigned Bits> bool isMemWithSimmOffset() const { - return isMem() && isConstantMemOff() && isInt<Bits>(getConstantMemOff()) - && getMemBase()->isGPRAsmReg(); + template <unsigned Bits, unsigned ShiftAmount = 0> + bool isMemWithSimmOffset() const { + return isMem() && isConstantMemOff() && + isShiftedInt<Bits, ShiftAmount>(getConstantMemOff()) && + getMemBase()->isGPRAsmReg(); } template <unsigned Bits> bool isMemWithSimmOffsetGPR() const { return isMem() && isConstantMemOff() && isInt<Bits>(getConstantMemOff()) && @@ -3800,6 +3802,18 @@ bool MipsAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, case Match_MemGPSImm9: return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), "expected memory with $gp and 9-bit signed offset"); + case Match_MemSImm10: + return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), + "expected memory with 10-bit signed offset"); + case Match_MemSImm10Lsl1: + return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), + "expected memory with 11-bit signed offset and multiple of 2"); + case Match_MemSImm10Lsl2: + return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), + "expected memory with 12-bit signed offset and multiple of 4"); + case Match_MemSImm10Lsl3: + return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), + "expected memory with 13-bit signed offset and multiple of 8"); } llvm_unreachable("Implement any new match types added!"); |