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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2012-01-11 03:56:41 +0000 | 
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2012-01-11 03:56:41 +0000 | 
| commit | 870c4e92b90f30e8ac85e705936bbff4481d8d6b (patch) | |
| tree | 0ac348d6e9bcd0eef750a39ab53c487de767d09b /llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | |
| parent | 642f0f6a40313fa9c16d941f7691652deb60f08e (diff) | |
| download | bcm5719-llvm-870c4e92b90f30e8ac85e705936bbff4481d8d6b.tar.gz bcm5719-llvm-870c4e92b90f30e8ac85e705936bbff4481d8d6b.zip | |
Add the skeleton of an asm parser for mips.
llvm-svn: 147923
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 66 | 
1 files changed, 66 insertions, 0 deletions
| diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp new file mode 100644 index 00000000000..58b55902575 --- /dev/null +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -0,0 +1,66 @@ +//===-- MipsAsmParser.cpp - Parse Mips assembly to MCInst instructions ----===// +// +//                     The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "MCTargetDesc/MipsMCTargetDesc.h" +#include "llvm/MC/MCParser/MCAsmLexer.h" +#include "llvm/MC/MCTargetAsmParser.h" +#include "llvm/Support/TargetRegistry.h" + +using namespace llvm; + +namespace { +class MipsAsmParser : public MCTargetAsmParser { +  bool MatchAndEmitInstruction(SMLoc IDLoc, +                               SmallVectorImpl<MCParsedAsmOperand*> &Operands, +                               MCStreamer &Out); + +  bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc); + +  bool ParseInstruction(StringRef Name, SMLoc NameLoc, +                                SmallVectorImpl<MCParsedAsmOperand*> &Operands); + +  bool ParseDirective(AsmToken DirectiveID); + +public: +  MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser) +    : MCTargetAsmParser() { +  } + +}; +} + +bool MipsAsmParser:: +MatchAndEmitInstruction(SMLoc IDLoc, +                        SmallVectorImpl<MCParsedAsmOperand*> &Operands, +                        MCStreamer &Out) { +  return true; +} + +bool MipsAsmParser:: +ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) { +  return true; +} + +bool MipsAsmParser:: +ParseInstruction(StringRef Name, SMLoc NameLoc, +                 SmallVectorImpl<MCParsedAsmOperand*> &Operands) { +  return true; +} + +bool MipsAsmParser:: +ParseDirective(AsmToken DirectiveID) { +  return true; +} + +extern "C" void LLVMInitializeMipsAsmParser() { +  RegisterMCAsmParser<MipsAsmParser> X(TheMipsTarget); +  RegisterMCAsmParser<MipsAsmParser> Y(TheMipselTarget); +  RegisterMCAsmParser<MipsAsmParser> A(TheMips64Target); +  RegisterMCAsmParser<MipsAsmParser> B(TheMips64elTarget); +} | 

