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| author | Toma Tabacu <toma.tabacu@imgtec.com> | 2015-05-20 08:54:45 +0000 |
|---|---|---|
| committer | Toma Tabacu <toma.tabacu@imgtec.com> | 2015-05-20 08:54:45 +0000 |
| commit | 81496c1dec057780c0076d9a892e11a4248cc203 (patch) | |
| tree | 5c8a5454cb8a2b96d19ccf5999d510fedc75f55f /llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | |
| parent | 49ad36ca1689fdbf88275765c4e5b47e166e9e0f (diff) | |
| download | bcm5719-llvm-81496c1dec057780c0076d9a892e11a4248cc203.tar.gz bcm5719-llvm-81496c1dec057780c0076d9a892e11a4248cc203.zip | |
[mips] [IAS] Factor out .set nomacro warning. NFC.
Reviewers: dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D9772
llvm-svn: 237780
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 71e962c74d4..fcec18e1875 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -448,6 +448,8 @@ public: /// Warn if RegIndex is the same as the current AT. void warnIfRegIndexIsAT(unsigned RegIndex, SMLoc Loc); + + void warnIfNoMacro(SMLoc Loc); }; } @@ -1759,8 +1761,7 @@ bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, tmpInst.addOperand(MCOperand::createImm(ImmValue)); Instructions.push_back(tmpInst); } else if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { - if (!AssemblerOptions.back()->isMacro()) - Warning(IDLoc, "macro instruction expanded into multiple instructions"); + warnIfNoMacro(IDLoc); // For all other values which are representable as a 32-bit integer: // li d,j => lui d,hi16(j) @@ -1795,8 +1796,7 @@ bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, Error(IDLoc, "instruction requires a 32-bit immediate"); return true; } - if (!AssemblerOptions.back()->isMacro()) - Warning(IDLoc, "macro instruction expanded into multiple instructions"); + warnIfNoMacro(IDLoc); // <------- lo32 ------> // <------- hi32 ------> @@ -1830,8 +1830,7 @@ bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, Error(IDLoc, "instruction requires a 32-bit immediate"); return true; } - if (!AssemblerOptions.back()->isMacro()) - Warning(IDLoc, "macro instruction expanded into multiple instructions"); + warnIfNoMacro(IDLoc); // <------- hi32 ------> <------- lo32 ------> // <- hi16 -> <- lo16 -> @@ -1934,8 +1933,7 @@ MipsAsmParser::expandLoadAddressImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc, void MipsAsmParser::expandLoadAddressSym( const MCOperand &DstRegOp, const MCOperand &SymOp, bool Is32BitSym, SMLoc IDLoc, SmallVectorImpl<MCInst> &Instructions) { - if (!AssemblerOptions.back()->isMacro()) - Warning(IDLoc, "macro instruction expanded into multiple instructions"); + warnIfNoMacro(IDLoc); if (Is32BitSym && isABI_N64()) Warning(IDLoc, "instruction loads the 32-bit address of a 64-bit symbol"); @@ -2256,6 +2254,11 @@ void MipsAsmParser::warnIfRegIndexIsAT(unsigned RegIndex, SMLoc Loc) { ") without \".set noat\""); } +void MipsAsmParser::warnIfNoMacro(SMLoc Loc) { + if (!AssemblerOptions.back()->isMacro()) + Warning(Loc, "macro instruction expanded into multiple instructions"); +} + void MipsAsmParser::printWarningWithFixIt(const Twine &Msg, const Twine &FixMsg, SMRange Range, bool ShowColors) { |
