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| author | Ranjeet Singh <Ranjeet.Singh@arm.com> | 2015-06-30 11:30:42 +0000 |
|---|---|---|
| committer | Ranjeet Singh <Ranjeet.Singh@arm.com> | 2015-06-30 11:30:42 +0000 |
| commit | 5b119091a130c2a09e9128b9e874efabb7c9c69f (patch) | |
| tree | f948f236beaf848c46c2c5d410bcb04f020682cf /llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | |
| parent | f256184693d166f23eb2d0ed6379e9348909c7d2 (diff) | |
| download | bcm5719-llvm-5b119091a130c2a09e9128b9e874efabb7c9c69f.tar.gz bcm5719-llvm-5b119091a130c2a09e9128b9e874efabb7c9c69f.zip | |
There are a few places where subtarget features are still
represented by uint64_t, this patch replaces these
usages with the FeatureBitset (std::bitset) type.
Differential Revision: http://reviews.llvm.org/D10542
llvm-svn: 241058
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 8f7968939cb..14ca1032e3b 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -127,6 +127,7 @@ class MipsAsmParser : public MCTargetAsmParser { bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, uint64_t &ErrorInfo, + FeatureBitset &ErrorMissingFeature, bool MatchingInlineAsm) override; /// Parse a register as used in CFI directives @@ -2722,12 +2723,13 @@ bool MipsAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, uint64_t &ErrorInfo, + FeatureBitset &ErrorMissingFeature, bool MatchingInlineAsm) { MCInst Inst; SmallVector<MCInst, 8> Instructions; unsigned MatchResult = - MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm); + MatchInstructionImpl(Operands, Inst, ErrorInfo, ErrorMissingFeature, MatchingInlineAsm); switch (MatchResult) { case Match_Success: { |
