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authorJozef Kolek <jozef.kolek@imgtec.com>2014-12-23 16:16:33 +0000
committerJozef Kolek <jozef.kolek@imgtec.com>2014-12-23 16:16:33 +0000
commit12c6982b3b4c09a7ea1d6dcc39b6ff847c1710db (patch)
tree217ebe0d4ea4c71789747a4358ac47b2a71861de /llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
parent43eba818cd2b03302d072f7fa0aa32bfa36fa3a8 (diff)
downloadbcm5719-llvm-12c6982b3b4c09a7ea1d6dcc39b6ff847c1710db.tar.gz
bcm5719-llvm-12c6982b3b4c09a7ea1d6dcc39b6ff847c1710db.zip
[mips][microMIPS] Implement LWSP and SWSP instructions
Differential Revision: http://reviews.llvm.org/D6416 llvm-svn: 224771
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp')
-rw-r--r--llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 44e0532f413..a00e57953f9 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -824,6 +824,11 @@ public:
return isMem() && isConstantMemOff() && isUInt<Bits>(getConstantMemOff())
&& getMemBase()->isRegIdx() && (getMemBase()->getGPR32Reg() == Mips::SP);
}
+ template <unsigned Bits> bool isMemWithUimmWordAlignedOffsetSP() const {
+ return isMem() && isConstantMemOff() && isUInt<Bits>(getConstantMemOff())
+ && (getConstantMemOff() % 4 == 0) && getMemBase()->isRegIdx()
+ && (getMemBase()->getGPR32Reg() == Mips::SP);
+ }
bool isRegList16() const {
if (!isRegList())
return false;
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