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authorAnton Korobeynikov <anton@korobeynikov.info>2019-01-10 22:59:50 +0000
committerAnton Korobeynikov <anton@korobeynikov.info>2019-01-10 22:59:50 +0000
commit0681d6bc90fe80a1c7534d5f4da96820b5da2037 (patch)
treecd768395b0460381275d08d52e4f531a81e01389 /llvm/lib/Target/MSP430
parent29ffb6d5580356dc4a7fa6201c051d2ec760193c (diff)
downloadbcm5719-llvm-0681d6bc90fe80a1c7534d5f4da96820b5da2037.tar.gz
bcm5719-llvm-0681d6bc90fe80a1c7534d5f4da96820b5da2037.zip
[MSP430] Minor fixes/improvements for assembler/disassembler
* Teach AsmParser to recognize @rn in distination operand as 0(rn). * Do not allow Disassembler decoding instructions that have size more than a number of input bytes. * Fix UB in MSP430MCCodeEmitter. Patch by Kristina Bessonova! Differential Revision: https://reviews.llvm.org/D56547 llvm-svn: 350903
Diffstat (limited to 'llvm/lib/Target/MSP430')
-rw-r--r--llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp6
-rw-r--r--llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp12
-rw-r--r--llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp2
3 files changed, 18 insertions, 2 deletions
diff --git a/llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp b/llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
index 3cc6da2c21a..1ad70ac72c7 100644
--- a/llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
+++ b/llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
@@ -497,7 +497,11 @@ bool MSP430AsmParser::ParseOperand(OperandVector &Operands) {
getLexer().Lex(); // Eat '+'
return false;
}
- Operands.push_back(MSP430Operand::CreateIndReg(RegNo, StartLoc, EndLoc));
+ if (Operands.size() > 1) // Emulate @rd in destination position as 0(rd)
+ Operands.push_back(MSP430Operand::CreateMem(RegNo,
+ MCConstantExpr::create(0, getContext()), StartLoc, EndLoc));
+ else
+ Operands.push_back(MSP430Operand::CreateIndReg(RegNo, StartLoc, EndLoc));
return false;
}
case AsmToken::Hash:
diff --git a/llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp b/llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
index 2a66b4ed7f2..e5da130f9bb 100644
--- a/llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
+++ b/llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
@@ -249,6 +249,10 @@ DecodeStatus MSP430Disassembler::getInstructionI(MCInst &MI, uint64_t &Size,
case amSymbolic:
case amImmediate:
case amAbsolute:
+ if (Bytes.size() < (Words + 1) * 2) {
+ Size = 2;
+ return DecodeStatus::Fail;
+ }
Insn |= (uint64_t)support::endian::read16le(Bytes.data() + 2) << 16;
++Words;
break;
@@ -259,6 +263,10 @@ DecodeStatus MSP430Disassembler::getInstructionI(MCInst &MI, uint64_t &Size,
case amIndexed:
case amSymbolic:
case amAbsolute:
+ if (Bytes.size() < (Words + 1) * 2) {
+ Size = 2;
+ return DecodeStatus::Fail;
+ }
Insn |= (uint64_t)support::endian::read16le(Bytes.data() + Words * 2)
<< (Words * 16);
++Words;
@@ -296,6 +304,10 @@ DecodeStatus MSP430Disassembler::getInstructionII(MCInst &MI, uint64_t &Size,
case amSymbolic:
case amImmediate:
case amAbsolute:
+ if (Bytes.size() < (Words + 1) * 2) {
+ Size = 2;
+ return DecodeStatus::Fail;
+ }
Insn |= (uint64_t)support::endian::read16le(Bytes.data() + 2) << 16;
++Words;
break;
diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp
index adf2384f6e9..06f9f307cb1 100644
--- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp
+++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp
@@ -128,7 +128,7 @@ unsigned MSP430MCCodeEmitter::getMemOpValue(const MCInst &MI, unsigned Op,
const MCOperand &MO2 = MI.getOperand(Op + 1);
if (MO2.isImm()) {
Offset += 2;
- return (MO2.getImm() << 4) | Reg;
+ return ((unsigned)MO2.getImm() << 4) | Reg;
}
assert(MO2.isExpr() && "Expr operand expected");
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