Fix some issues in WalkChainUsers dealing with

CopyToReg/CopyFromReg/INLINEASM.  These are annoying because
they have the same opcode before an after isel.  Fix this by
setting their NodeID to -1 to indicate that they are selected,
just like what automatically happens when selecting things that
end up being machine nodes.

With that done, give IsLegalToFold a new flag that causes it to
ignore chains.  This lets the HandleMergeInputChains routine be
the one place that validates chains after a match is successful,
enabling the new hotness in chain processing.  This smarter
chain processing eliminates the need for "PreprocessRMW" in the
X86 and MSP430 backends and enables MSP to start matching it's
multiple mem operand instructions more aggressively.

I currently #if out the dead code in the X86 backend and MSP 
backend, I'll remove it for real in a follow-on patch.

The testcase changes are:
  test/CodeGen/X86/sse3.ll: we generate better code
  test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was 
      miscompiling this before, we now generate correct code
      Convert it to filecheck while I'm at it.
  test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem
      folding to make anton happy. :)

llvm-svn: 97596

1 files changed, 5 insertions, 0 deletions

diff --git a/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp b/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
index 54062a00f02..2ca184e5eaf 100644
--- a/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
@@ -125,7 +125,9 @@ namespace {
     bool MatchWrapper(SDValue N, MSP430ISelAddressMode &AM);
     bool MatchAddressBase(SDValue N, MSP430ISelAddressMode &AM);
 
+#if 0
     bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root) const;
+#endif
 
     virtual bool
     SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
@@ -323,6 +325,7 @@ SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
   return false;
 }
 
+#if 0
 bool MSP430DAGToDAGISel::IsLegalToFold(SDValue N, SDNode *U,
                                        SDNode *Root) const {
   if (OptLevel == CodeGenOpt::None) return false;
@@ -357,6 +360,7 @@ bool MSP430DAGToDAGISel::IsLegalToFold(SDValue N, SDNode *U,
   // Proceed to 'generic' cycle finder code
   return SelectionDAGISel::IsLegalToFold(N, U, Root);
 }
+#endif
 
 
 /// MoveBelowTokenFactor - Replace TokenFactor operand with load's chain operand
@@ -516,6 +520,7 @@ static bool isRMWLoad(SDValue N, SDValue Chain, SDValue Address,
 /// This allows selection of mem-mem instructions. Yay!
 
 void MSP430DAGToDAGISel::PreprocessForRMW() {
+  return;
   for (SelectionDAG::allnodes_iterator I = CurDAG->allnodes_begin(),
          E = CurDAG->allnodes_end(); I != E; ++I) {
     if (!ISD::isNON_TRUNCStore(I))