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| author | Duraid Madina <duraid@octopus.com.au> | 2005-04-11 05:55:56 +0000 |
|---|---|---|
| committer | Duraid Madina <duraid@octopus.com.au> | 2005-04-11 05:55:56 +0000 |
| commit | fb43ef78c555170e5d8e9bc701db80c0ddec1d0e (patch) | |
| tree | 18cf318423cee9e226d81d8c0240376eaff5348c /llvm/lib/Target/IA64/IA64RegisterInfo.cpp | |
| parent | 7a763bfbc51e6985886f5b5741a3efd5dca6760d (diff) | |
| download | bcm5719-llvm-fb43ef78c555170e5d8e9bc701db80c0ddec1d0e.tar.gz bcm5719-llvm-fb43ef78c555170e5d8e9bc701db80c0ddec1d0e.zip | |
assorted fixes:
* clean up immediates (we use 14, 22 and 64 bit immediates now. sane.)
* fold r0/f0/f1 registers into comparisons against 0/0.0/1.0
* fix nasty thinko - didn't use two-address form of conditional add
for extending bools to integers, so occasionally there would be
garbage in the result. it's amazing how often zeros are just
sitting around in registers ;) - this should fix a bunch of tests.
llvm-svn: 21221
Diffstat (limited to 'llvm/lib/Target/IA64/IA64RegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/IA64/IA64RegisterInfo.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/IA64/IA64RegisterInfo.cpp b/llvm/lib/Target/IA64/IA64RegisterInfo.cpp index 18ffcec246b..a5b0572dbd4 100644 --- a/llvm/lib/Target/IA64/IA64RegisterInfo.cpp +++ b/llvm/lib/Target/IA64/IA64RegisterInfo.cpp @@ -189,7 +189,7 @@ void IA64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const //fix up the old: MI.SetMachineOperandReg(i, IA64::r22); MachineInstr* nMI; - nMI=BuildMI(IA64::MOVLSI32, 1, IA64::r22).addSImm(Offset); + nMI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addSImm(Offset); MBB.insert(II, nMI); nMI=BuildMI(IA64::ADD, 2, IA64::r22).addReg(BaseRegister) .addReg(IA64::r22); @@ -280,7 +280,7 @@ void IA64RegisterInfo::emitPrologue(MachineFunction &MF) const { MI=BuildMI(IA64::ADDIMM22, 2, IA64::r12).addReg(IA64::r12).addImm(-NumBytes); MBB.insert(MBBI, MI); } else { // we use r22 as a scratch register here - MI=BuildMI(IA64::MOVLSI32, 1, IA64::r22).addSImm(-NumBytes); + MI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addSImm(-NumBytes); // FIXME: MOVLSI32 expects a _u_32imm MBB.insert(MBBI, MI); // first load the decrement into r22 MI=BuildMI(IA64::ADD, 2, IA64::r12).addReg(IA64::r12).addReg(IA64::r22); @@ -328,7 +328,7 @@ void IA64RegisterInfo::emitEpilogue(MachineFunction &MF, MI=BuildMI(IA64::ADDIMM22, 2, IA64::r12).addReg(IA64::r12).addImm(NumBytes); MBB.insert(MBBI, MI); } else { - MI=BuildMI(IA64::MOVLI32, 1, IA64::r22).addImm(NumBytes); + MI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addImm(NumBytes); MBB.insert(MBBI, MI); MI=BuildMI(IA64::ADD, 2, IA64::r12).addReg(IA64::r12).addReg(IA64::r22); MBB.insert(MBBI, MI); |
