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authorNate Begeman <natebegeman@mac.com>2005-11-30 18:54:35 +0000
committerNate Begeman <natebegeman@mac.com>2005-11-30 18:54:35 +0000
commit6f8c1ace6e6091765137a321f55a830b544d6980 (patch)
tree6cf4dcfb538812f575819c53cafd480a4b4ec42d /llvm/lib/Target/IA64/IA64AsmPrinter.cpp
parentf621b333f3dbfbab96ff763c679ae1fe4ab85ba7 (diff)
downloadbcm5719-llvm-6f8c1ace6e6091765137a321f55a830b544d6980.tar.gz
bcm5719-llvm-6f8c1ace6e6091765137a321f55a830b544d6980.zip
No longer track value types for asm printer operands, and remove them as
an argument to every operand printing function. Requires some slight tweaks to x86, the only user. llvm-svn: 24541
Diffstat (limited to 'llvm/lib/Target/IA64/IA64AsmPrinter.cpp')
-rw-r--r--llvm/lib/Target/IA64/IA64AsmPrinter.cpp24
1 files changed, 8 insertions, 16 deletions
diff --git a/llvm/lib/Target/IA64/IA64AsmPrinter.cpp b/llvm/lib/Target/IA64/IA64AsmPrinter.cpp
index dbb470ba3c7..c1ee80def4f 100644
--- a/llvm/lib/Target/IA64/IA64AsmPrinter.cpp
+++ b/llvm/lib/Target/IA64/IA64AsmPrinter.cpp
@@ -23,7 +23,6 @@
#include "llvm/Assembly/Writer.h"
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Mangler.h"
#include "llvm/ADT/Statistic.h"
@@ -65,7 +64,7 @@ namespace {
bool printInstruction(const MachineInstr *MI);
// This method is used by the tablegen'erated instruction printer.
- void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){
+ void printOperand(const MachineInstr *MI, unsigned OpNo){
const MachineOperand &MO = MI->getOperand(OpNo);
if (MO.getType() == MachineOperand::MO_MachineRegister) {
assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??");
@@ -76,30 +75,25 @@ namespace {
}
}
- void printS8ImmOperand(const MachineInstr *MI, unsigned OpNo,
- MVT::ValueType VT) {
+ void printS8ImmOperand(const MachineInstr *MI, unsigned OpNo) {
int val=(unsigned int)MI->getOperand(OpNo).getImmedValue();
if(val>=128) val=val-256; // if negative, flip sign
O << val;
}
- void printS14ImmOperand(const MachineInstr *MI, unsigned OpNo,
- MVT::ValueType VT) {
+ void printS14ImmOperand(const MachineInstr *MI, unsigned OpNo) {
int val=(unsigned int)MI->getOperand(OpNo).getImmedValue();
if(val>=8192) val=val-16384; // if negative, flip sign
O << val;
}
- void printS22ImmOperand(const MachineInstr *MI, unsigned OpNo,
- MVT::ValueType VT) {
+ void printS22ImmOperand(const MachineInstr *MI, unsigned OpNo) {
int val=(unsigned int)MI->getOperand(OpNo).getImmedValue();
if(val>=2097152) val=val-4194304; // if negative, flip sign
O << val;
}
- void printU64ImmOperand(const MachineInstr *MI, unsigned OpNo,
- MVT::ValueType VT) {
+ void printU64ImmOperand(const MachineInstr *MI, unsigned OpNo) {
O << (uint64_t)MI->getOperand(OpNo).getImmedValue();
}
- void printS64ImmOperand(const MachineInstr *MI, unsigned OpNo,
- MVT::ValueType VT) {
+ void printS64ImmOperand(const MachineInstr *MI, unsigned OpNo) {
// XXX : nasty hack to avoid GPREL22 "relocation truncated to fit" linker
// errors - instead of add rX = @gprel(CPI<whatever>), r1;; we now
// emit movl rX = @gprel(CPI<whatever);;
@@ -116,13 +110,11 @@ namespace {
}
}
- void printGlobalOperand(const MachineInstr *MI, unsigned OpNo,
- MVT::ValueType VT) {
+ void printGlobalOperand(const MachineInstr *MI, unsigned OpNo) {
printOp(MI->getOperand(OpNo), false); // this is NOT a br.call instruction
}
- void printCallOperand(const MachineInstr *MI, unsigned OpNo,
- MVT::ValueType VT) {
+ void printCallOperand(const MachineInstr *MI, unsigned OpNo) {
printOp(MI->getOperand(OpNo), true); // this is a br.call instruction
}
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