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| author | Ron Lieberman <ronl@codeaurora.org> | 2017-10-02 00:16:15 +0000 |
|---|---|---|
| committer | Ron Lieberman <ronl@codeaurora.org> | 2017-10-02 00:16:15 +0000 |
| commit | f90493d220acae49407a6142c9ddd6841c11fc2b (patch) | |
| tree | 0038b8a7e2ee0b989ad403a4c6b7e9b5904456c5 /llvm/lib/Target/Hexagon | |
| parent | 6e025a3ecc92c818bc7efd8db2d8a960adb0322e (diff) | |
| download | bcm5719-llvm-f90493d220acae49407a6142c9ddd6841c11fc2b.tar.gz bcm5719-llvm-f90493d220acae49407a6142c9ddd6841c11fc2b.zip | |
[Hexagon] Patch to Extract i1 element from vector of i1
This patch extracts 1 element from vector consisting
of elements of size 1 bit at given index.
llvm-svn: 314641
Diffstat (limited to 'llvm/lib/Target/Hexagon')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp index fcde4224a00..0d2b27f089e 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -2750,7 +2750,13 @@ HexagonTargetLowering::LowerEXTRACT_VECTOR(SDValue Op, MVT SVT = VecVT.getSimpleVT(); uint64_t W = CW->getZExtValue(); - if (W == 32) { + if (W == 1) { + MVT LocVT = MVT::getIntegerVT(SVT.getSizeInBits()); + SDValue VecCast = DAG.getNode(ISD::BITCAST, dl, LocVT, Vec); + SDValue Shifted = DAG.getNode(ISD::SRA, dl, LocVT, VecCast, Offset); + return DAG.getNode(ISD::AND, dl, LocVT, Shifted, + DAG.getConstant(1, dl, LocVT)); + } else if (W == 32) { // Translate this node into EXTRACT_SUBREG. unsigned Subreg = (X == 0) ? Hexagon::isub_lo : 0; |
