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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-11-02 14:17:47 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-11-02 14:17:47 +0000 |
| commit | f070544f8e2269eb94610d13484f471b3b4fe19d (patch) | |
| tree | 20246abcd20505a6a167c99611da1c5fb496fdd4 /llvm/lib/Target/Hexagon | |
| parent | 86746bd1a8048cbb4c288248a86f7e48a6dcbdde (diff) | |
| download | bcm5719-llvm-f070544f8e2269eb94610d13484f471b3b4fe19d.tar.gz bcm5719-llvm-f070544f8e2269eb94610d13484f471b3b4fe19d.zip | |
[Hexagon] Do not reduce load size for globals in small-data
Small-data (i.e. GP-relative) loads and stores allow 16-bit scaled
offset. For a load of a value of type T, the small-data area is
equivalent to an array "T sdata[65536]". This implies that objects
of smaller sizes need to be closer to the beginning of sdata,
while larger objects may be farther away, or otherwise the offset
may be insufficient to reach it. Similarly, an object of a larger
size should not be accessed via a load of a smaller size.
llvm-svn: 345975
Diffstat (limited to 'llvm/lib/Target/Hexagon')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 15 | ||||
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelLowering.h | 3 |
2 files changed, 18 insertions, 0 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp index f2c27e5e39b..7a708a8ac24 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -3080,6 +3080,21 @@ HexagonTargetLowering::findRepresentativeClass(const TargetRegisterInfo *TRI, return TargetLowering::findRepresentativeClass(TRI, VT); } +bool HexagonTargetLowering::shouldReduceLoadWidth(SDNode *Load, + ISD::LoadExtType ExtTy, EVT NewVT) const { + auto *L = cast<LoadSDNode>(Load); + std::pair<SDValue,int> BO = getBaseAndOffset(L->getBasePtr()); + // Small-data object, do not shrink. + if (BO.first.getOpcode() == HexagonISD::CONST32_GP) + return false; + if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(BO.first)) { + auto &HTM = static_cast<const HexagonTargetMachine&>(getTargetMachine()); + const auto *GO = dyn_cast_or_null<const GlobalObject>(GA->getGlobal()); + return !GO || !HTM.getObjFileLowering()->isGlobalInSmallSection(GO, HTM); + } + return true; +} + Value *HexagonTargetLowering::emitLoadLinked(IRBuilder<> &Builder, Value *Addr, AtomicOrdering Ord) const { BasicBlock *BB = Builder.GetInsertBlock(); diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.h b/llvm/lib/Target/Hexagon/HexagonISelLowering.h index 8efb3c9cda5..39af19b9b07 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.h +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.h @@ -304,6 +304,9 @@ namespace HexagonISD { SDValue getPICJumpTableRelocBase(SDValue Table, SelectionDAG &DAG) const override; + bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy, + EVT NewVT) const override; + // Handling of atomic RMW instructions. Value *emitLoadLinked(IRBuilder<> &Builder, Value *Addr, AtomicOrdering Ord) const override; |

