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author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-08-01 17:15:30 +0000 |
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committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-08-01 17:15:30 +0000 |
commit | ddafa2cd5fcc841bf6bf2a85e943a411592375bc (patch) | |
tree | 1a6a85031ac0cddfeea3ac31beecd36cdf334356 /llvm/lib/Target/Hexagon | |
parent | 08c47b37d35c071890a04aae6870711a3831511d (diff) | |
download | bcm5719-llvm-ddafa2cd5fcc841bf6bf2a85e943a411592375bc.tar.gz bcm5719-llvm-ddafa2cd5fcc841bf6bf2a85e943a411592375bc.zip |
[Hexagon] Check for offset overflow when reserving scavenging slots
Scavenging slots were only reserved when pseudo-instruction expansion in
frame lowering created new virtual registers. It is possible to still
need a scavenging slot even if no virtual registers were created, in cases
where the stack is large enough to overflow instruction offsets.
llvm-svn: 277355
Diffstat (limited to 'llvm/lib/Target/Hexagon')
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 15 | ||||
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonFrameLowering.h | 3 |
2 files changed, 16 insertions, 2 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp index ed468fe490b..05773440dac 100644 --- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp @@ -1869,7 +1869,7 @@ void HexagonFrameLowering::determineCalleeSaves(MachineFunction &MF, // We need to reserve a a spill slot if scavenging could potentially require // spilling a scavenged register. - if (!NewRegs.empty()) { + if (!NewRegs.empty() || mayOverflowFrameOffset(MF)) { MachineFrameInfo &MFI = MF.getFrameInfo(); MachineRegisterInfo &MRI = MF.getRegInfo(); SetVector<const TargetRegisterClass*> SpillRCs; @@ -2407,3 +2407,16 @@ bool HexagonFrameLowering::useRestoreFunction(MachineFunction &MF, : SpillFuncThreshold; return Threshold < NumCSI; } + + +bool HexagonFrameLowering::mayOverflowFrameOffset(MachineFunction &MF) const { + unsigned StackSize = MF.getFrameInfo().estimateStackSize(MF); + auto &HST = MF.getSubtarget<HexagonSubtarget>(); + // A fairly simplistic guess as to whether a potential load/store to a + // stack location could require an extra register. It does not account + // for store-immediate instructions. + if (HST.useHVXOps()) + return StackSize > 256; + return false; +} + diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.h b/llvm/lib/Target/Hexagon/HexagonFrameLowering.h index b4a39072b72..79e2cf12774 100644 --- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.h +++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.h @@ -141,9 +141,10 @@ private: void addCalleeSaveRegistersAsImpOperand(MachineInstr *MI, const CSIVect &CSI, bool IsDef, bool IsKill) const; - bool shouldInlineCSR(llvm::MachineFunction &MF, const CSIVect &CSI) const; + bool shouldInlineCSR(MachineFunction &MF, const CSIVect &CSI) const; bool useSpillFunction(MachineFunction &MF, const CSIVect &CSI) const; bool useRestoreFunction(MachineFunction &MF, const CSIVect &CSI) const; + bool mayOverflowFrameOffset(MachineFunction &MF) const; }; } // End llvm namespace |