diff options
author | Colin LeMahieu <colinl@codeaurora.org> | 2016-10-08 17:18:51 +0000 |
---|---|---|
committer | Colin LeMahieu <colinl@codeaurora.org> | 2016-10-08 17:18:51 +0000 |
commit | c69f7ff6c075d24a8c509376f40f70644e159bee (patch) | |
tree | 7d67219d6fa7306b5314b85aa9f92d7b096319ae /llvm/lib/Target/Hexagon | |
parent | 897bab9b35dd80e10e8a9c34dcac072c173fcffb (diff) | |
download | bcm5719-llvm-c69f7ff6c075d24a8c509376f40f70644e159bee.tar.gz bcm5719-llvm-c69f7ff6c075d24a8c509376f40f70644e159bee.zip |
[Hexagon] Adding change of flow max 1 (cofMax1) TS flag for marking this restriction rather than implying it from TypeJR.
llvm-svn: 283665
Diffstat (limited to 'llvm/lib/Target/Hexagon')
5 files changed, 16 insertions, 4 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonInstrFormats.td b/llvm/lib/Target/Hexagon/HexagonInstrFormats.td index 0bfb04447f2..fe585ce7ed4 100644 --- a/llvm/lib/Target/Hexagon/HexagonInstrFormats.td +++ b/llvm/lib/Target/Hexagon/HexagonInstrFormats.td @@ -179,6 +179,9 @@ class InstHexagon<dag outs, dag ins, string asmstr, list<dag> pattern, bits<1> isAccumulator = 0; let TSFlags{54} = isAccumulator; + bit cofMax1 = 0; + let TSFlags{60} = cofMax1; + // Fields used for relation models. bit isNonTemporal = 0; string isNT = ""; // set to "true" for non-temporal vector stores. diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h index 759200f3a88..c2465bb1371 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h @@ -204,6 +204,9 @@ namespace HexagonII { // Complex XU, prevent xu competition by prefering slot3 PrefersSlot3Pos = 55, PrefersSlot3Mask = 0x1, + + CofMax1Pos = 60, + CofMax1Mask = 0x1 }; // *** The code above must match HexagonInstrFormat*.td *** // diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp index 7fa0963adaa..e627f026c8a 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp @@ -431,6 +431,11 @@ bool HexagonMCInstrInfo::isCanon(MCInstrInfo const &MCII, MCInst const &MCI) { HexagonMCInstrInfo::getType(MCII, MCI) != HexagonII::TypeENDLOOP); } +bool HexagonMCInstrInfo::isCofMax1(MCInstrInfo const &MCII, MCInst const &MCI) { + const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; + return ((F >> HexagonII::CofMax1Pos) & HexagonII::CofMax1Mask); +} + bool HexagonMCInstrInfo::isCompound(MCInstrInfo const &MCII, MCInst const &MCI) { return (getType(MCII, MCI) == HexagonII::TypeCOMPOUND); diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h index cd521c16001..d701c3ade69 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h @@ -170,6 +170,7 @@ bool isBundle(MCInst const &MCI); // Return whether the insn is an actual insn. bool isCanon(MCInstrInfo const &MCII, MCInst const &MCI); +bool isCofMax1(MCInstrInfo const &MCII, MCInst const &MCI); bool isCompound(MCInstrInfo const &MCII, MCInst const &MCI); // Return the duplex iclass given the two duplex classes diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp index 5187798f588..88f37d620dc 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp @@ -171,7 +171,7 @@ bool HexagonShuffler::check() { unsigned slotJump = slotFirstJump; unsigned slotLoadStore = slotFirstLoadStore; // Number of branches, solo branches, indirect branches. - unsigned jumps = 0, jump1 = 0, jumpr = 0; + unsigned jumps = 0, jump1 = 0; // Number of memory operations, loads, solo loads, stores, solo stores, single // stores. unsigned memory = 0, loads = 0, load0 = 0, stores = 0, store0 = 0, store1 = 0; @@ -207,6 +207,8 @@ bool HexagonShuffler::check() { ++pSlot3Cnt; slot3ISJ = ISJ; } + if (HexagonMCInstrInfo::isCofMax1(MCII, *ID)) + ++jump1; switch (HexagonMCInstrInfo::getType(MCII, *ID)) { case HexagonII::TypeXTYPE: @@ -214,8 +216,6 @@ bool HexagonShuffler::check() { ++xtypeFloat; break; case HexagonII::TypeJR: - ++jumpr; - LLVM_FALLTHROUGH; case HexagonII::TypeJ: ++jumps; break; @@ -304,7 +304,7 @@ bool HexagonShuffler::check() { if (HexagonMCInstrInfo::getDesc(MCII, *ID).isBranch() || HexagonMCInstrInfo::getDesc(MCII, *ID).isCall()) if (jumps > 1) { - if (jumpr || slotJump < slotLastJump) { + if (slotJump < slotLastJump) { // Error if indirect branch with another branch or // no more slots available for branches. Error = SHUFFLE_ERROR_BRANCHES; |