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| author | Zvi Rackover <zvi.rackover@intel.com> | 2017-07-26 08:06:58 +0000 |
|---|---|---|
| committer | Zvi Rackover <zvi.rackover@intel.com> | 2017-07-26 08:06:58 +0000 |
| commit | 1b73682243b2a21832169ef1faf88f1b1508255d (patch) | |
| tree | c2786a72fb331b1f2ea0bf334213612046ffa02a /llvm/lib/Target/Hexagon | |
| parent | 60bc7e0f0aaaa4a121432e2683d446d082e4cd91 (diff) | |
| download | bcm5719-llvm-1b73682243b2a21832169ef1faf88f1b1508255d.tar.gz bcm5719-llvm-1b73682243b2a21832169ef1faf88f1b1508255d.zip | |
TargetLowering: Change isShuffleMaskLegal's mask argument type to ArrayRef<int>. NFCI.
Changing mask argument type from const SmallVectorImpl<int>& to
ArrayRef<int>.
This came up in D35700 where a mask is received as an ArrayRef<int> and
we want to pass it to TargetLowering::isShuffleMaskLegal().
Also saves a few lines of code.
llvm-svn: 309085
Diffstat (limited to 'llvm/lib/Target/Hexagon')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelLowering.h | 3 |
2 files changed, 3 insertions, 4 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp index f02cd6d3992..364973b088b 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -2278,8 +2278,8 @@ static StridedLoadKind isStridedLoad(const ArrayRef<int> &Mask) { return StridedLoadKind::NoPattern; } -bool HexagonTargetLowering::isShuffleMaskLegal(const SmallVectorImpl<int> &Mask, - EVT VT) const { +bool HexagonTargetLowering::isShuffleMaskLegal(ArrayRef<int> Mask, + EVT VT) const { if (Subtarget.useHVXOps()) return isStridedLoad(Mask) != StridedLoadKind::NoPattern; return true; diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.h b/llvm/lib/Target/Hexagon/HexagonISelLowering.h index 1b1462cce5a..b903ef6e424 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.h +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.h @@ -113,8 +113,7 @@ namespace HexagonISD { bool shouldExpandBuildVectorWithShuffles(EVT VT, unsigned DefinedValues) const override; - bool isShuffleMaskLegal(const SmallVectorImpl<int> &Mask, EVT VT) - const override; + bool isShuffleMaskLegal(ArrayRef<int> Mask, EVT VT) const override; SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; const char *getTargetNodeName(unsigned Opcode) const override; |

