diff options
author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-04-14 21:19:17 +0000 |
---|---|---|
committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-04-14 21:19:17 +0000 |
commit | 9edaea21afd0eb257a22cc4a32f19a497552e674 (patch) | |
tree | aa59ab5183e68736f7f4fc091d64654339bf3c44 /llvm/lib/Target/Hexagon/RDFGraph.cpp | |
parent | fabb68fc0621dabe8e551fa813ea7a0b87ca0cdf (diff) | |
download | bcm5719-llvm-9edaea21afd0eb257a22cc4a32f19a497552e674.tar.gz bcm5719-llvm-9edaea21afd0eb257a22cc4a32f19a497552e674.zip |
[RDF] No longer ignore implicit defs or uses on any instructions
This used to be a Hexagon-specific treatment, but is no longer needed
since it's switched to subregister liveness tracking.
llvm-svn: 300369
Diffstat (limited to 'llvm/lib/Target/Hexagon/RDFGraph.cpp')
-rw-r--r-- | llvm/lib/Target/Hexagon/RDFGraph.cpp | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/llvm/lib/Target/Hexagon/RDFGraph.cpp b/llvm/lib/Target/Hexagon/RDFGraph.cpp index 8d70e355c5b..7a2895aa4e8 100644 --- a/llvm/lib/Target/Hexagon/RDFGraph.cpp +++ b/llvm/lib/Target/Hexagon/RDFGraph.cpp @@ -1289,20 +1289,7 @@ void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) { return true; }; - // Collect a set of registers that this instruction implicitly uses - // or defines. Implicit operands from an instruction will be ignored - // unless they are listed here. - RegisterSet ImpUses, ImpDefs; - if (const uint16_t *ImpD = In.getDesc().getImplicitDefs()) - while (uint16_t R = *ImpD++) - ImpDefs.insert(RegisterRef(R)); - if (const uint16_t *ImpU = In.getDesc().getImplicitUses()) - while (uint16_t R = *ImpU++) - ImpUses.insert(RegisterRef(R)); - bool IsCall = isCall(In); - bool NeedsImplicit = IsCall || In.isInlineAsm() || In.isReturn(); - bool IsPredicated = TII.isPredicated(In); unsigned NumOps = In.getNumOperands(); // Avoid duplicate implicit defs. This will not detect cases of implicit @@ -1364,8 +1351,6 @@ void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) { if (!R || !TargetRegisterInfo::isPhysicalRegister(R) || DoneDefs.test(R)) continue; RegisterRef RR = makeRegRef(Op); - if (!NeedsImplicit && !ImpDefs.count(RR)) - continue; uint16_t Flags = NodeAttrs::None; if (TOI.isPreserving(In, OpN)) { Flags |= NodeAttrs::Preserving; @@ -1394,14 +1379,6 @@ void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) { unsigned R = Op.getReg(); if (!R || !TargetRegisterInfo::isPhysicalRegister(R)) continue; - RegisterRef RR = makeRegRef(Op); - // Add implicit uses on return and call instructions, and on predicated - // instructions regardless of whether or not they appear in the instruction - // descriptor's list. - bool Implicit = Op.isImplicit(); - bool TakeImplicit = NeedsImplicit || IsPredicated; - if (Implicit && !TakeImplicit && !ImpUses.count(RR)) - continue; uint16_t Flags = NodeAttrs::None; if (Op.isUndef()) Flags |= NodeAttrs::Undef; |