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author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2015-03-31 13:35:12 +0000 |
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committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2015-03-31 13:35:12 +0000 |
commit | c05dff17929f47a37b43cfcd3bbfc7d865ea5557 (patch) | |
tree | d8dde58db96b7936d28cc3bb56b59a291ecba4df /llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | |
parent | 8c4fd2bdebac385bf935e51c69b3619d836a9c4f (diff) | |
download | bcm5719-llvm-c05dff17929f47a37b43cfcd3bbfc7d865ea5557.tar.gz bcm5719-llvm-c05dff17929f47a37b43cfcd3bbfc7d865ea5557.zip |
Expand MUX instructions early on Hexagon
This time with all files included.
llvm-svn: 233696
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp index 48b0bc8baf3..06798665cb0 100644 --- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp +++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp @@ -27,11 +27,15 @@ using namespace llvm; static cl:: opt<bool> DisableHardwareLoops("disable-hexagon-hwloops", - cl::Hidden, cl::desc("Disable Hardware Loops for Hexagon target")); + cl::Hidden, cl::desc("Disable Hardware Loops for Hexagon target")); static cl::opt<bool> DisableHexagonCFGOpt("disable-hexagon-cfgopt", - cl::Hidden, cl::ZeroOrMore, cl::init(false), - cl::desc("Disable Hexagon CFG Optimization")); + cl::Hidden, cl::ZeroOrMore, cl::init(false), + cl::desc("Disable Hexagon CFG Optimization")); + +static cl::opt<bool> EnableExpandCondsets("hexagon-expand-condsets", + cl::init(true), cl::Hidden, cl::ZeroOrMore, + cl::desc("Early expansion of MUX")); /// HexagonTargetMachineModule - Note that this is used on hosts that @@ -55,6 +59,10 @@ static MachineSchedRegistry SchedCustomRegistry("hexagon", "Run Hexagon's custom scheduler", createVLIWMachineSched); +namespace llvm { + FunctionPass *createHexagonExpandCondsets(); +} + /// HexagonTargetMachine ctor - Create an ILP32 architecture model. /// @@ -79,7 +87,15 @@ namespace { class HexagonPassConfig : public TargetPassConfig { public: HexagonPassConfig(HexagonTargetMachine *TM, PassManagerBase &PM) - : TargetPassConfig(TM, PM) {} + : TargetPassConfig(TM, PM) { + bool NoOpt = (TM->getOptLevel() == CodeGenOpt::None); + if (!NoOpt) { + if (EnableExpandCondsets) { + Pass *Exp = createHexagonExpandCondsets(); + insertPass(&RegisterCoalescerID, IdentifyingPassPtr(Exp)); + } + } + } HexagonTargetMachine &getHexagonTargetMachine() const { return getTM<HexagonTargetMachine>(); |