diff options
author | Eric Christopher <echristo@gmail.com> | 2015-02-02 18:46:31 +0000 |
---|---|---|
committer | Eric Christopher <echristo@gmail.com> | 2015-02-02 18:46:31 +0000 |
commit | 6ff7ed6446d69dbaaf2b6086234e57dfa14cf89d (patch) | |
tree | 66704344136c403ba370f14f2f4b641e4bd307bd /llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | |
parent | 12a5c0db57a153f3f9a7d3c8db5b4b5c4f50bf18 (diff) | |
download | bcm5719-llvm-6ff7ed6446d69dbaaf2b6086234e57dfa14cf89d.tar.gz bcm5719-llvm-6ff7ed6446d69dbaaf2b6086234e57dfa14cf89d.zip |
Get TargetRegisterInfo and TargetInstrInfo off of the MachineFunction
and remove unnecessary class variables.
llvm-svn: 227832
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp index dc8ae70c590..c18729022d9 100644 --- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp +++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp @@ -160,7 +160,7 @@ void HexagonPassConfig::addPreEmitPass() { addPass(createHexagonNewValueJump(), false); // Expand Spill code for predicate registers. - addPass(createHexagonExpandPredSpillCode(TM), false); + addPass(createHexagonExpandPredSpillCode(), false); // Split up TFRcondsets into conditional transfers. addPass(createHexagonSplitTFRCondSets(TM), false); |