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| author | Brendon Cahoon <bcahoon@codeaurora.org> | 2018-06-26 18:44:05 +0000 |
|---|---|---|
| committer | Brendon Cahoon <bcahoon@codeaurora.org> | 2018-06-26 18:44:05 +0000 |
| commit | b7169c435af07dbe33ec79ddbdd24f961fb608b9 (patch) | |
| tree | d5441f49cda5d3b3ee44f12e768a72a51744054d /llvm/lib/Target/Hexagon/HexagonSubtarget.cpp | |
| parent | 0948bc2086e0148c8b8c5471d2f85603aba847f6 (diff) | |
| download | bcm5719-llvm-b7169c435af07dbe33ec79ddbdd24f961fb608b9.tar.gz bcm5719-llvm-b7169c435af07dbe33ec79ddbdd24f961fb608b9.zip | |
[Hexagon] Add a "generic" cpu
Add the generic processor for Hexagon so that it can be used
with 3rd party programs that create a back-end with the
"generic" CPU. This patch also enables the JIT for Hexagon.
Differential Revision: https://reviews.llvm.org/D48571
llvm-svn: 335641
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonSubtarget.cpp')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonSubtarget.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp b/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp index 864289f59e1..0686d6eb611 100644 --- a/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp +++ b/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp @@ -92,6 +92,7 @@ HexagonSubtarget::HexagonSubtarget(const Triple &TT, StringRef CPU, HexagonSubtarget & HexagonSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) { static std::map<StringRef, Hexagon::ArchEnum> CpuTable{ + {"generic", Hexagon::ArchEnum::V60}, {"hexagonv4", Hexagon::ArchEnum::V4}, {"hexagonv5", Hexagon::ArchEnum::V5}, {"hexagonv55", Hexagon::ArchEnum::V55}, |
