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authorSirish Pande <spande@codeaurora.org>2012-02-22 16:45:10 +0000
committerSirish Pande <spande@codeaurora.org>2012-02-22 16:45:10 +0000
commit2a783d5b942c99ef49d68ac2b6d4f1b512837d56 (patch)
treeb719a4831c7c9d07536dce58c8e8f817b7c75f4e /llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
parent53e191e77e81c9c57455e78efa5daf7fae485062 (diff)
downloadbcm5719-llvm-2a783d5b942c99ef49d68ac2b6d4f1b512837d56.tar.gz
bcm5719-llvm-2a783d5b942c99ef49d68ac2b6d4f1b512837d56.zip
Efficient pattern for store truncate. Patch by Evandro Menezes.
llvm-svn: 151166
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp3
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp b/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
index d776c09459b..4eacf0129e4 100644
--- a/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
@@ -206,8 +206,7 @@ void HexagonRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
} else if ((MI.getOpcode() == Hexagon::STriw) ||
(MI.getOpcode() == Hexagon::STrid) ||
(MI.getOpcode() == Hexagon::STrih) ||
- (MI.getOpcode() == Hexagon::STrib) ||
- (MI.getOpcode() == Hexagon::STriwt)) {
+ (MI.getOpcode() == Hexagon::STrib)) {
// For stores, we need a reserved register. Change
// memw(r30 + #10000) = r0 to:
//
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