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authorRafael Espindola <rafael.espindola@gmail.com>2016-06-21 21:51:41 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2016-06-21 21:51:41 +0000
commit7b4ef068c6f5e1199f37b6f8a2881491b0cc09db (patch)
tree53c218243a765627310a6acb4a07e5f26c7a8fbc /llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
parenta7484c91802796cf80d5286e8dd41c76674b3ca3 (diff)
downloadbcm5719-llvm-7b4ef068c6f5e1199f37b6f8a2881491b0cc09db.tar.gz
bcm5719-llvm-7b4ef068c6f5e1199f37b6f8a2881491b0cc09db.zip
Delete more dead code.
Found by gcc 6. llvm-svn: 273322
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp37
1 files changed, 0 insertions, 37 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
index caadd58c74f..4dff0dbc2b7 100644
--- a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
@@ -80,8 +80,6 @@ private:
bool analyzeUses(unsigned DefR, const NodeList &UNodeList,
InstrEvalMap &InstrEvalResult, short &SizeInc);
bool hasRepForm(MachineInstr *MI, unsigned TfrDefR);
- MachineInstr *getReachedDefMI(NodeAddr<StmtNode *> SN, unsigned OffsetReg,
- bool &HasReachingDef);
bool canRemoveAddasl(NodeAddr<StmtNode *> AddAslSN, MachineInstr *MI,
const NodeList &UNodeList);
void getAllRealUses(NodeAddr<StmtNode *> SN, NodeList &UNodeList);
@@ -128,41 +126,6 @@ bool HexagonOptAddrMode::hasRepForm(MachineInstr *MI, unsigned TfrDefR) {
return false;
}
-MachineInstr *HexagonOptAddrMode::getReachedDefMI(NodeAddr<StmtNode *> SN,
- unsigned OffsetReg,
- bool &HasReachingDef) {
- MachineInstr *ReachedDefMI = NULL;
- NodeId RD = 0;
- for (NodeAddr<UseNode *> UN : SN.Addr->members_if(DFG->IsUse, *DFG)) {
- RegisterRef UR = UN.Addr->getRegRef();
- if (OffsetReg == UR.Reg) {
- RD = UN.Addr->getReachingDef();
- if (!RD)
- continue;
- HasReachingDef = true;
- }
- }
- if (HasReachingDef) {
- NodeAddr<DefNode *> RDN = DFG->addr<DefNode *>(RD);
- DEBUG({
- NodeAddr<StmtNode *> ReachingIA = RDN.Addr->getOwner(*DFG);
- dbgs() << "\t\t\t[Def Node]: "
- << Print<NodeAddr<InstrNode *>>(ReachingIA, *DFG) << "\n";
- });
- NodeId ReachedID = RDN.Addr->getReachedDef();
- if (!ReachedID)
- return ReachedDefMI;
-
- NodeAddr<DefNode *> ReachedDN = DFG->addr<DefNode *>(ReachedID);
- NodeAddr<StmtNode *> ReachedIA = ReachedDN.Addr->getOwner(*DFG);
- DEBUG(dbgs() << "\t\t\t[Reached Def Node]: "
- << Print<NodeAddr<InstrNode *>>(ReachedIA, *DFG) << "\n");
- ReachedDefMI = ReachedIA.Addr->getCode();
- DEBUG(dbgs() << "\nReached Def MI === " << *ReachedDefMI << "\n");
- }
- return ReachedDefMI;
-}
-
// Check if addasl instruction can be removed. This is possible only
// if it's feeding to only load/store instructions with base + register
// offset as these instruction can be tranformed to use 'absolute plus
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