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authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-04-19 15:15:51 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-04-19 15:15:51 +0000
commit333b2bf2ed997fe84ec65c007315048b0281a194 (patch)
tree971d405f50d091abf949e8ca5e448e1cec71ac7b /llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
parent634f57e0bbbfe716a322121fa4d13e8812d38d0f (diff)
downloadbcm5719-llvm-333b2bf2ed997fe84ec65c007315048b0281a194.tar.gz
bcm5719-llvm-333b2bf2ed997fe84ec65c007315048b0281a194.zip
[Hexagon] Generate proper offset in opt-addr-mode
Also, make a few changes to allow using the pass in .mir testcases. Among other things, change the abbreviation from opt-amode to amode-opt, because otherwise lit would expand the "opt" part to the full path to the opt binary. llvm-svn: 300707
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp17
1 files changed, 6 insertions, 11 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
index f12c9f3d20f..27b40f134b1 100644
--- a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
@@ -44,10 +44,8 @@ using namespace llvm;
using namespace rdf;
namespace llvm {
-
FunctionPass *createHexagonOptAddrMode();
- void initializeHexagonOptAddrModePass(PassRegistry &);
-
+ void initializeHexagonOptAddrModePass(PassRegistry&);
} // end namespace llvm
namespace {
@@ -58,10 +56,7 @@ public:
HexagonOptAddrMode()
: MachineFunctionPass(ID), HII(nullptr), MDT(nullptr), DFG(nullptr),
- LV(nullptr) {
- PassRegistry &R = *PassRegistry::getPassRegistry();
- initializeHexagonOptAddrModePass(R);
- }
+ LV(nullptr) {}
StringRef getPassName() const override {
return "Optimize addressing mode of load/store";
@@ -108,11 +103,11 @@ private:
char HexagonOptAddrMode::ID = 0;
-INITIALIZE_PASS_BEGIN(HexagonOptAddrMode, "opt-amode",
+INITIALIZE_PASS_BEGIN(HexagonOptAddrMode, "amode-opt",
"Optimize addressing mode", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
INITIALIZE_PASS_DEPENDENCY(MachineDominanceFrontier)
-INITIALIZE_PASS_END(HexagonOptAddrMode, "opt-amode", "Optimize addressing mode",
+INITIALIZE_PASS_END(HexagonOptAddrMode, "amode-opt", "Optimize addressing mode",
false, false)
bool HexagonOptAddrMode::hasRepForm(MachineInstr &MI, unsigned TfrDefR) {
@@ -485,14 +480,14 @@ bool HexagonOptAddrMode::changeAddAsl(NodeAddr<UseNode *> AddAslUN,
MIB.add(AddAslMI->getOperand(2));
MIB.add(AddAslMI->getOperand(3));
const GlobalValue *GV = ImmOp.getGlobal();
- MIB.addGlobalAddress(GV, UseMI->getOperand(2).getImm(),
+ MIB.addGlobalAddress(GV, UseMI->getOperand(2).getImm()+ImmOp.getOffset(),
ImmOp.getTargetFlags());
OpStart = 3;
} else if (UseMID.mayStore()) {
MIB.add(AddAslMI->getOperand(2));
MIB.add(AddAslMI->getOperand(3));
const GlobalValue *GV = ImmOp.getGlobal();
- MIB.addGlobalAddress(GV, UseMI->getOperand(1).getImm(),
+ MIB.addGlobalAddress(GV, UseMI->getOperand(1).getImm()+ImmOp.getOffset(),
ImmOp.getTargetFlags());
MIB.add(UseMI->getOperand(2));
OpStart = 3;
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