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authorCraig Topper <craig.topper@intel.com>2017-08-28 15:32:50 +0000
committerCraig Topper <craig.topper@intel.com>2017-08-28 15:32:50 +0000
commitfa86fd928ee1fa086b25835ba76997445acdb812 (patch)
treed3305f0c9802474f1f24ff62ce62129414fef134 /llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp
parent029a21dfdc9d0930beaf31dafaf5e69ba04443d8 (diff)
downloadbcm5719-llvm-fa86fd928ee1fa086b25835ba76997445acdb812.tar.gz
bcm5719-llvm-fa86fd928ee1fa086b25835ba76997445acdb812.zip
[X86] Make 128/256-bit extract_subvector Legal instead of Custom. Move combining with BUILD_VECTOR from Legalization to DAG combine
EXTRACT_SUBVECTOR was marked Custom solely so we could combine it with BUILD_VECTOR operations to create smaller BUILD_VECTORS during Legalization. But that sort of combining should really be done by the DAG combiner. This patch adds the last piece of needed supported DAG combine to handle this. Once that's done we can make the EXTRACT_SUBVECTOR operations Legal. Differential Revision: https://reviews.llvm.org/D37197 llvm-svn: 311893
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp')
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