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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-02-16 20:25:23 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-02-16 20:25:23 +0000 |
| commit | fb9503c08019653afa888d02e7f45ec25145b3c7 (patch) | |
| tree | d13162b2eb6b1e5bcbacecea5215af64fc7b086e /llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp | |
| parent | c4c31e2020a7ad36f055a668eca10902e1d724e9 (diff) | |
| download | bcm5719-llvm-fb9503c08019653afa888d02e7f45ec25145b3c7.tar.gz bcm5719-llvm-fb9503c08019653afa888d02e7f45ec25145b3c7.zip | |
[Hexagon] Start using regmasks on calls
All the cool targets are doing it...
llvm-svn: 295371
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp b/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp index 9d8c29463bf..7189b5a52c4 100644 --- a/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp +++ b/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp @@ -111,9 +111,12 @@ void llvm::HexagonLowerToMC(const MCInstrInfo &MCII, const MachineInstr *MI, default: MI->print(errs()); llvm_unreachable("unknown operand type"); + case MachineOperand::MO_RegisterMask: + continue; case MachineOperand::MO_Register: // Ignore all implicit register operands. - if (MO.isImplicit()) continue; + if (MO.isImplicit()) + continue; MCO = MCOperand::createReg(MO.getReg()); break; case MachineOperand::MO_FPImmediate: { |
