diff options
| author | Sirish Pande <spande@codeaurora.org> | 2012-04-23 17:49:40 +0000 |
|---|---|---|
| committer | Sirish Pande <spande@codeaurora.org> | 2012-04-23 17:49:40 +0000 |
| commit | a3f8ba2439de325a3494ba66f8524d6ba9e6999a (patch) | |
| tree | 83ba8ef90c761626f9ebbd0a3dc0a26c549754f1 /llvm/lib/Target/Hexagon/HexagonIntrinsicsDerived.td | |
| parent | 2c7bf00fba0c4fe7661495be69175f3fe14e405f (diff) | |
| download | bcm5719-llvm-a3f8ba2439de325a3494ba66f8524d6ba9e6999a.tar.gz bcm5719-llvm-a3f8ba2439de325a3494ba66f8524d6ba9e6999a.zip | |
Hexagon V5 (floating point) support.
llvm-svn: 155367
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonIntrinsicsDerived.td')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonIntrinsicsDerived.td | 34 |
1 files changed, 22 insertions, 12 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonIntrinsicsDerived.td b/llvm/lib/Target/Hexagon/HexagonIntrinsicsDerived.td index 68eaf68480e..2788101d5a6 100644 --- a/llvm/lib/Target/Hexagon/HexagonIntrinsicsDerived.td +++ b/llvm/lib/Target/Hexagon/HexagonIntrinsicsDerived.td @@ -12,18 +12,28 @@ // Optimized with intrinisics accumulates // def : Pat <(mul DoubleRegs:$src1, DoubleRegs:$src2), - (COMBINE_rr - (Hexagon_M2_maci - (Hexagon_M2_maci (EXTRACT_SUBREG (MPYU64 (EXTRACT_SUBREG DoubleRegs:$src1, subreg_loreg), - (EXTRACT_SUBREG DoubleRegs:$src2, subreg_loreg)), - subreg_hireg), - (EXTRACT_SUBREG DoubleRegs:$src1, subreg_loreg), - (EXTRACT_SUBREG DoubleRegs:$src2, subreg_hireg)), - (EXTRACT_SUBREG DoubleRegs:$src2, subreg_loreg), - (EXTRACT_SUBREG DoubleRegs:$src1, subreg_hireg)), - (EXTRACT_SUBREG (MPYU64 (EXTRACT_SUBREG DoubleRegs:$src1, subreg_loreg), - (EXTRACT_SUBREG DoubleRegs:$src2, subreg_loreg)), - subreg_loreg))>; + (i64 + (COMBINE_rr + (HEXAGON_M2_maci + (HEXAGON_M2_maci + (i32 + (EXTRACT_SUBREG + (i64 + (MPYU64 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), + subreg_loreg)), + (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), + subreg_loreg)))), + subreg_hireg)), + (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_loreg)), + (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), subreg_hireg))), + (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), subreg_loreg)), + (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_hireg))), + (i32 + (EXTRACT_SUBREG + (i64 + (MPYU64 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_loreg)), + (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), + subreg_loreg)))), subreg_loreg))))>; |
